IP Library › Granted Patent US 8,755,045
Granted Patent B2
US 8,755,045 · App. 13/344,670 · Granted Jun 17, 2014

Detecting method for forming semiconductor device

Inventors: Jyuh-Fuh Lin (Chunan Township, Miaoli County, TW); Te-Chih Huang (Chu-Bei, TW); Guo-Tsai Huang (Hsinchu County, TW); Jia-Rui Hu (Taichung, TW); Chih-Ming Ke (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
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Quick Facts
Patent No.
US 8,755,045
App. No.
13/344,670
Granted
Jun 17, 2014
Kind
B2
Abstract

In one embodiment, a method for detecting design defects is provided. The method includes receiving design data of an integrated circuit (IC) on a wafer, measuring wafer topography across the wafer to obtain topography data, calculating a scanner moving average from the topography data and the design data to provide a scanner defocus map across the wafer, and determining a hotspot design defect from the scanner defocus map. A computer readable storage medium, and a system for detecting design defects are also provided.

Claims (264)

1. A method of detecting design defects, the method comprising:

receiving design data of an integrated circuit (IC) on a wafer;

measuring wafer topography across the wafer to obtain topography data;

calculating a scanner moving average from the topography data and the design data to provide a scanner defocus map across the wafer; and

determining a hotspot design defect from the scanner defocus map.

2. The method of claim 1 , wherein calculating the scanner moving average includes integrating scanner focus residuals along x and y directions across a wafer plane.

3. The method of claim 1 , wherein calculating the scanner moving average follows the equation:

M

⁢

⁢

A

⁡

(

x

,

y

)

=

1

s

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∫

-

s

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2

s

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{

w

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z

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y

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x

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xR

y

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(

x

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ⅆ

v

wherein x denotes the x-axis coordinate of the wafer plane,

y denotes the y-axis coordinate of the wafer plane,

z denotes an average wafer local height under a slit after least square (LSQ) plane fitting.

Rx denotes a scanner least square plane fit rotation angle about the x-axis within a slit,

Ry denotes a scanner least square plane fit rotation angle about the y-axis within a slit,

s denotes slit length along y axis,

w denotes wafer topography (z-height) measured by level sensor, and

v denotes a dummy variable of integration along slit in y direction.

4. The method of claim 1 , wherein determining the hotspot design defect includes detecting a hotspot defect pattern in the scanner defocus map.

5. The method of claim 4 , wherein the hotspot defect pattern is from a library of hotspot defect patterns.

6. The method of claim 1 , wherein determining the hotspot design defect is performed prior to photolithography processing.

7. The method of claim 1 , further comprising:

filtering the hotspot design defect from the design data.

8. A computer readable storage medium comprising computer readable instructions which when executed by a computer cause the computer to perform the operations of:

receiving design data of an integrated circuit (IC) on a wafer;

measuring wafer topography across the wafer to obtain topography data;

calculating a scanner moving average from the topography data and the design data to provide a scanner defocus map across the wafer; and

determining a hotspot design defect from the scanner defocus map.

9. The computer readable storage medium of claim 8 , wherein calculating the scanner moving average includes integrating scanner focus residuals along x and y directions across a wafer plane.

10. The computer readable storage medium of claim 8 , wherein calculating the scanner moving average follows the equation:

M

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A

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(

x

,

y

)

=

1

s

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{

w

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(

x

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y

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(

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}

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ⅆ

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wherein x denotes the x-axis coordinate of the wafer plane,

y denotes the y-axis coordinate of the wafer plane,

z denotes an average wafer local height under a slit after least square (LSQ) plane fitting.

Rx denotes a scanner least square plane fit rotation angle about the x-axis within a slit,

Ry denotes a scanner least square plane fit rotation angle about the y-axis within a slit,

s denotes slit length along y axis,

w denotes wafer topography (z-height) measured by level sensor, and

v denotes a dummy variable of integration along slit in y direction.

11. The computer readable storage medium of claim 8 , wherein determining the hotspot design defect includes detecting a hotspot defect pattern in the scanner defocus map.

12. The computer readable storage medium of claim 11 , wherein the hotspot defect pattern is searched from a library of hotspot defect patterns.

13. The computer readable storage medium of claim 8 , wherein determining the hotspot design defect is performed prior to photolithography processing.

14. The computer readable storage medium of claim 8 , further comprising computer readable instructions which when executed by a computer cause the computer to perform the operation of either filtering the hotspot design defect from the design data or compensating for the hotspot design defect by adjusting a scanner depth of focus.

15. A system for detecting design defects, the system comprising:

an inspection tool configured to measure wafer topography across a wafer to obtain topography data; and

a processor operably coupled to the inspection tool, the processor configured to perform the operations of:

receiving design data of the IC on the wafer;

calculating a scanner moving average from the topography data and the design data to provide a scanner defocus map across the wafer; and

determining a hotspot design defect from the scanner defocus map.

16. The system of claim 15 , wherein the processor is configured to calculate the scanner moving average by integrating scanner focus residuals along x and y directions across a wafer plane.

17. The system of claim 15 , wherein the processor is configured to calculate the scanner moving average following the equation:

M

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A

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(

x

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=

1

s

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∫

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{

w

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(

x

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y

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z

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(

x

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y

+

v

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vR

x

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(

x

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y

+

v

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xR

y

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(

x

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y

+

v

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]

}

⁢

ⅆ

v

wherein x denotes a function of an x-axis of the wafer plane,

y denotes a function of a y-axis of the wafer plane,

z denotes a function of a z-axis perpendicular to the wafer plane,

Rx denotes a scanner focus residual along the x-axis,

Ry denotes a scanner focus residual along the y-axis,

s denotes slit length along y-axis,

w denotes wafer topography (z-height) measured by level sensor, and

v denotes a dummy variable of integration along slit in y direction.

18. The system of claim 15 , wherein the processor is configured to determine the hotspot design defect prior to photolithography processing by detecting a hotspot defect pattern in the scanner defocus map, the hotspot defect pattern stored in a library of hotspot defect patterns.

19. The system of claim 15 , wherein the processor is further configured to perform the operation of either filtering the hotspot design defect from the design data or compensating for the hotspot design defect by adjusting a scanner depth of focus.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 15, 2012
From: LIN, JYUH-FUH; HUANG, TE-CHIH; HUANG, GUO-TSAI; HU, JIA-RUI; KE, CHIH-MING
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 027868/0267 →
Continuity (1)
Related Publication 20130176558A1 · Jul 11, 2013