IP Library Granted Patent US 8,634,230
Granted Patent B2
US 8,634,230 · App. 13/348,950 · Granted Jan 21, 2014

Semiconductor device and method for driving the same

Inventor: Hideki Uochi (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,634,230
App. No.
13/348,950
Granted
Jan 21, 2014
Kind
B2
Abstract

Data is written in the following manner: potentials of first and second control gates of a transistor are set at a potential for making a storage gate of the transistor a conductor, a potential of data to be stored is supplied to the storage gate, and at least one of the potentials of the first and second control gates is set at a potential for making the storage gate an insulator. Data is read in the following manner: the potential of the second control gate is set at a potential for making the storage gate an insulator; a potential is supplied to a wiring connected to one of a source and a drain of the transistor; then, a potential for reading is supplied to the first control gate to detect a change in the potential of a bit line connected to the other of the source and the drain.

Claims (79)

1. A semiconductor device comprising:

a transistor comprising a first gate, a second gate, a third gate, and a semiconductor layer including a channel formation region, the third gate including an oxide semiconductor; and

a wiring,

wherein the third gate includes a first region overlapping with the first gate and the channel formation region, and a second region extending beyond an edge of the first gate and overlapping with the second gate, and

wherein the second region of the third gate is electrically connected to the wiring.

2. The semiconductor device according to claim 1 ,

wherein the wiring is a bit line.

3. The semiconductor device according to claim 1 ,

wherein the semiconductor layer includes a crystalline semiconductor.

4. The semiconductor device according to claim 1 ,

wherein the transistor is a p-channel transistor.

5. The semiconductor device according to claim 1 ,

wherein the transistor is an n-channel transistor.

6. An electronic device comprising the semiconductor device according to claim 1 .

7. The electronic device according to claim 6 ,

wherein the electronic device has a function of a computer, a mobile phone, a personal digital assistant, a camera, electronic paper, or a television device.

8. A semiconductor device comprising:

a transistor comprising a first gate, a second gate, a third gate, and a semiconductor layer including a channel formation region, the third gate including an oxide semiconductor;

a first wiring;

a second wiring; and

a third wiring,

wherein the first gate is electrically connected to the first wiring,

wherein the second gate is electrically connected to the third wiring,

wherein one of source and drain of the transistor is electrically connected to the second wiring,

wherein the other of the source and the drain of the transistor is electrically connected to the third wiring,

wherein the third gate comprises a first region overlapping with the first gate and the channel formation region, and a second region extending beyond an edge of the first gate and overlapping with the second gate, and

wherein the second region of the third gate is electrically connected to the second wiring.

9. The semiconductor device according to claim 8 ,

wherein the semiconductor layer includes a crystalline semiconductor.

10. The semiconductor device according to claim 8 ,

wherein the transistor is a p-channel transistor.

11. The semiconductor device according to claim 8 ,

wherein the transistor is an n-channel transistor.

12. An electronic device comprising the semiconductor device according to claim 8 .

13. The electronic device according to claim 12 ,

wherein the electronic device has a function of a computer, a mobile phone, a personal digital assistant, a camera, electronic paper, or a television device.

14. A semiconductor device comprising:

a transistor comprising a first control gate, a second control gate, a storage gate, and a semiconductor layer including a channel formation region, the storage gate including an oxide semiconductor;

a control line;

a bit line; and

a word line,

wherein the first control gate is electrically connected to the control line,

wherein the second control gate is electrically connected to the word line,

wherein the storage gate is electrically connected to the bit line,

wherein one of source and drain of the transistor is electrically connected to the bit line,

wherein the other of the source and the drain of the transistor is electrically connected to the word line, and

wherein the storage gate comprises a first region overlapping with the first control gate and the channel formation region, and a second region extending beyond an edge of the first control gate and overlapping with the second control gate.

15. The semiconductor device according to claim 14 ,

wherein a part of the first control gate and a part of the second control gate overlap with each other with a part of the storage gate sandwiched therebetween.

16. The semiconductor device according to claim 15 ,

wherein the semiconductor layer includes a crystalline semiconductor.

17. The semiconductor device according to claim 15 ,

wherein the transistor is a p-channel transistor.

18. The semiconductor device according to claim 15 ,

wherein the transistor is an n-channel transistor.

19. An electronic device comprising the semiconductor device according to claim 15 .

20. The electronic device according to claim 19 ,

wherein the electronic device has a function of a computer, a mobile phone, a personal digital assistant, a camera, electronic paper, or a television device.

21. A method for driving a semiconductor device,

the semiconductor device comprising:

a transistor comprising a first control gate, a second control gate, and a storage gate, the storage gate including an oxide semiconductor,

the method comprising the steps of:

setting a potential of the first control gate and a potential of the second control gate at a potential making the storage gate a conductor;

supplying a potential to be stored to the storage gate; and

setting at least one of the potential of the first control gate and the potential of the second control gate at a potential making the storage gate an insulator.

22. The method for driving a semiconductor device, according to claim 21 ,

wherein the potential to be stored to the storage gate is a potential turning off the transistor.

23. A method for driving a semiconductor device,

the semiconductor device comprising a transistor comprising a first control gate, a second control gate, and a storage gate, the storage gate including an oxide semiconductor,

the method comprising the steps of:

supplying a first potential to one of source and drain of the transistor,

supplying a second potential to the other of the source and the drain of the transistor; and

supplying a third potential to the first control gate to detect a potential change of the one of source and drain.

24. The method for driving a semiconductor device according to claim 23 ,

wherein a potential of the second control gate is a potential making at least part of the storage gate an insulator.

25. The method for driving a semiconductor device according to claim 23 ,

wherein the first potential is different from the second potential.

26. The method for driving a semiconductor device according to claim 23 ,

wherein the third potential is a negative potential.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2012
From: UOCHI, HIDEKI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 027527/0731 →
Priority Claims (1)
JP 2011-016957 · Jan 28, 2011 · national
Continuity (1)
Related Publication 20120194262A1 · Aug 2, 2012