High voltage device

1. A method of forming a device comprising:

providing a substrate having a device region, wherein the device region comprises a source region, a gate region and a drain region defined thereon;

forming a device well having device dopants of a device dopant concentration;

forming a drift well in the substrate between the gate region and drain region, wherein the drift well encompasses the drain region and underlaps a portion of the gate region and creates a gate overlap region O gate in the drift well;

the device well and drift well form a device and drift well (DDW) interface in the substrate in the gate region;

forming a gate on the substrate on the gate region, the gate includes first and second gate portions, wherein an interface of the first and second gate portions is at the DDW interface;

implanting gate dopants to dope the first gate portion with the gate dopants, wherein the first gate portion has a different dopant concentration of gate dopants than the second gate portion; and

forming a source and drain in the source region and drain region, wherein the drain is separated from the gate on a second side of the gate and the source is adjacent to the first side of the gate, wherein a channel of the device is disposed under the gate from the source to the DDW interface.

2. The method in claim 1 comprises forming an internal device isolation region along a channel width direction in the substrate between the gate and drain.

3. The method in claim 2 wherein the drift well underlaps the portion of the gate and creates the gate overlap region O gate between the edge of the drift well under the gate and an edge of the internal isolation region under the gate.

4. The method in claim 3 wherein the drift well encompasses the internal device isolation region.

5. The method in claim 4 comprises forming a device isolation region, wherein the device isolation region isolates the device region from other regions of the device.

6. The method of claim 1 wherein the first gate portion is on the first side of the gate and the second gate portion is on the second side of the gate.

7. The method in claim 2 wherein the device well encompasses the source, drain, drift well and internal device isolation region.

8. The method in claim 2 wherein:

the first gate portion is over the channel of the device between the source and the DDW interface; and

the first gate portion comprises a higher gate dopant concentration than the second gate portion.

9. The method in claim 1 wherein:

the first gate portion is over the channel of the device between the source and the DDW interface; and

the first portion comprises a higher gate dopant concentration than the second gate portion.

10. The method in claim 1 comprises forming a salicide block on the substrate over the drift well, the salicide block covers the second side of the gate and extends to the drain.

11. A method of forming a device comprising:

providing a substrate having a device region, wherein the device region comprises a source region, a gate region and a drain region defined thereon;

forming a device well having device dopants of a device dopant concentration;

forming a drift well in the substrate between the gate region and drain region, wherein the drift well encompasses the drain region and underlaps a portion of the gate region and creates a gate overlap region O gate in the drift well;

the device well and drift well form a device and drift well (DDW) interface in the substrate in the gate region;

forming a gate on the substrate on the gate region, the gate includes first and second gate portions, wherein an interface of the first and second gate portions is at the DDW interface, wherein the first gate portion is on a first side of the gate adjacent to the source region and the second gate portion is on a second side of the gate;

implanting gate dopants to dope the first gate portion with the gate dopants, wherein the first gate portion has a different dopant concentration of gate dopants than the second gate portion; and

forming a source and drain in the source region and drain region, wherein the drain is separated from the gate on the second side of the gate, wherein a channel of the device is disposed under the gate from the source to the DDW interface.

12. The method in claim 11 wherein:

the first gate portion is the channel of the device between the source and the DDW interface; and

the first gate portion comprises a higher gate dopant concentration than the second gate portion.

13. A method of forming a device comprising:

providing a substrate having a device region, wherein the device region comprises a source region, a gate region and a drain region defined thereon;

forming a device well having device dopants of a first device dopant concentration;

forming a drift well in the substrate between the gate region and drain region, wherein the drift well encompasses the drain region and underlaps a portion of the gate region and creates a gate overlap region O gate in the drift well;

the device well and drift well form a device and drift well (DDW) interface in the substrate in the gate region;

forming a gate on the substrate on the gate region, the gate includes first and second gate portions, wherein an interface of the first and second gate portions is at about the DDW interface; and

forming a source and drain in the source region and drain region, the drain is separated from the gate on a second side of the gate and the source is adjacent to a first side of the gate, wherein forming the source and drain also dopes the first gate portion of the gate to form a first doped gate portion, and wherein a channel of the device is disposed under the gate from the source to the DDW interface.

14. The method of claim 13 wherein forming the source and drain comprises:

forming an implant mask which protects a second portion of the gate; and

performing a first implant of source/drain (S/D) dopants which forms lightly doped region at least in the source region and the first doped gate portion which is lightly doped while leaving the second portion of the gate undoped.

15. The method of claim 14 wherein forming the source and drain comprises performing a second implant of source/drain (S/D) dopants which forms heavily doped regions in the source and drain regions and the first doped gate portion which is heavily doped while leaving the second portion of the gate undoped.

16. The method of claim 13 wherein forming the source and drain comprises:

performing a first implant of source/drain (S/D) dopants which forms lightly doped region at least in the source region and gate; and

forming an implant mask which protects the second portion of the gate after the first implant.

17. The method of claim 16 wherein forming the source and drain comprises performing a second implant of source/drain (S/D) dopants after forming the implant mask, wherein the second implant forms heavily doped regions in the source and drain regions and the first doped gate portion which is heavily doped while the second portion of the gate is lightly doped.

18. The method of claim 11 wherein:

the first doped gate portion comprises first polarity type dopants; and

the source and drain comprises first polarity type dopants.

19. The method in claim 13 comprises forming an internal device isolation region along a channel width direction in the substrate between the gate and drain.

20. The method in claim 13 comprises forming a salicide block on the substrate over the drift well, the salicide block covers the second side of the gate and extends to the drain.

21. The method in claim 11 comprises forming a salicide block on the substrate over the drift well, the salicide block covers the second side of the gate and extends to the drain.