Multilayer MIM capacitor
An improved semiconductor capacitor and method of fabrication is disclosed. A MIM stack, comprising alternating first-type and second-type metal layers (each separated by dielectric) is formed in a deep cavity. The entire stack can be planarized, and then patterned to expose a first area, and selectively etched to recess all first metal layers within the first area. A second selective etch is performed to recess all second metal layers within a second area. The etched recesses can be backfilled with dielectric. Separate electrodes can be formed; a first electrode formed in said first area and contacting all of said second-type metal layers and none of said first-type metal layers, and a second electrode formed in said second area and contacting all of said first-type metal layers and none of said second-type metal layers.
1. A method to form a deep-trench capacitor comprising:
providing substrate having a stack of metal layers in a cavity, said stack comprising first-type metal layers and second-type metal layers, wherein each adjacent pair of said stack comprises one first-type metal layer and one second-type metal layer, said stack further comprising an insulating layer between said adjacent pairs;
exposing a cross section of said stack;
etching said first-type metal layers within a first area of said cross section while not appreciably etching said second-type metal layers;
etching said second-type metal layers within a second area of said cross section while not appreciably etching said first-type metal layers.
2. The method of claim 1 wherein said etching said first-type metal layers creates a first recess and said etching said second-type metal layers creates a second recess, the method further comprising:
filling said first recess and said second recess with dielectric.
3. The method of claim 2 further comprising
connecting said first-type metal layers to said second-type metal layers by forming a conductive structure in contact with second-type metal layers within said first area and in contact with first-type metal layers within said second area.
4. The method of claim 2 further comprising:
covering said cross section with a conductive layer, etching said conductive layer to form a first electrode fully within said first area and a second electrode fully within said second area.
5. The method of claim 3 further comprising:
etching said conductive structure to form a first electrode fully within said first area and a second electrode fully within said second area.
6. The method of claim 5 wherein said etching said conductive structure is by reactive ion etch.
7. The method of claim 1 , wherein either of said etching steps comprises applying an etchant of hydrofluoric acid.
8. The method of claim 1 , wherein either of said etching steps comprises applying an etchant of hydrochloric acid.
9. The method of claim 1 , further comprising:
depositing at least one metal layer of said stack in said cavity by atomic layer deposition.
10. The method of claim 1 , further comprising:
depositing at least one of said insulating layer by PECVD or by atomic layer deposition.
11. The method of claim 1 , further comprising:
forming an insulating layer between said stack and said cavity by thermal processing.