IP Library › Granted Patent US 9,318,699
Granted Patent B2
US 9,318,699 · App. 13/352,680 · Granted Apr 19, 2016

Resistive memory cell structures and methods

Inventors: Fabio Pellizzer (Cornate d'Adda, IT); Ferdinando Bedeschi (Biassono, IT)
Assignee: Micron Technology, Inc.
H01L45/06H01L27/2463H01L45/126H01L45/1233H01L45/144H01L45/165H01L45/1675H01L45/1683
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Quick Facts
Patent No.
US 9,318,699
App. No.
13/352,680
Granted
Apr 19, 2016
Kind
B2
Abstract

Resistive memory cell structures and methods are described herein. One or more memory cell structures comprise a first resistive memory cell comprising a first resistance variable material and a second resistive memory cell comprising a second resistance variable material that is different than the first resistance variable material.

Claims (21)

1. A method of forming an array of resistive memory cells, the method comprising:

forming a first number of resistive memory cells in a first region of the array and a second number of resistive memory cells in a second region of the array; and

modifying an electrothermal property of a resistance variable material in at least one of the first region of the array and the second region of the array,

wherein modifying the electrothermal property of the resistance variable material in the at least one of the first and second regions includes thermal activation to modify the electrothermal properties of the resistance variable material in the first and second regions of the array.

2. The method of claim 1 , wherein modifying the electrothermal property of the resistance variable material in the at least one of the first and second regions includes at least one of performing a first ion implantation process on at least a portion of the first region and performing a second ion implantation on at least a portion of the second region.

3. The method of claim 2 , wherein performing the at least one of the first implantation process and the second ion implantation process includes implanting ions through a cap material formed on the resistance variable material.

4. The method of claim 1 , wherein modifying the electrothermal property of the resistance variable material in the at least one of the first and second regions includes:

forming a first reactant material on the resistance variable material in the first region; and

forming a second reactant material on the resistance variable material in the second region.

5. The method of claim 1 , wherein modifying the electrothermal property of the resistance variable material in the at least one of the first and second regions includes:

forming a reactant material of a first thickness on the resistance variable material in the first region; and

forming the reactant material of a different thickness on the resistance variable material in the second region.

6. The method of claim 4 , wherein modifying the electrothermal property of the resistance variable material in the at least one of the first and second regions includes:

removing a portion of the first reactant material;

forming the second reactant material where the portion of the first reactant material was removed and on the resistance variable material in the second region;

forming a cap material on the second reactant material; and

forming separate cell stacks corresponding to the respective first and second resistive memory cells.

7. The method of claim 1 , wherein modifying the electrothermal property of the resistance variable material in the at least one of the first and second regions includes:

performing a first ion implantation process using an ion of a first concentration on at least a portion of the first region; and

performing a second ion implantation using an ion of a second concentration on at least a portion of the second region,

wherein the first ion concentration is different than the second ion concentration.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 18, 2012
From: PELLIZZER, FABIO; BEDESCHI, FERDINANDO
To: MICRON TECHNOLOGY, INC.
Reel/Frame 027551/0963 →
Continuity (1)
Related Publication 20130181183A1 · Jul 18, 2013