IP Library › Granted Patent US 8,779,499
Granted Patent B2
US 8,779,499 · App. 13/352,693 · Granted Jul 15, 2014

Nonvolatile semiconductor memory device and method of manufacturing the same

Inventor: Masahiro Kiyotoshi (Mie, JP)
Assignee: Kabushiki Kaisha Toshiba
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Quick Facts
Patent No.
US 8,779,499
App. No.
13/352,693
Granted
Jul 15, 2014
Kind
B2
Abstract

According to one embodiment, a nonvolatile semiconductor memory device includes sheet-like memory strings arranged in a matrix shape substantially perpendicularly to a substrate. A control gate electrode film includes a common connecting section that extends in a first direction and an electrode forming section that is provided for each of memory cells above or below a floating gate electrode film via an inter-electrode dielectric film to project from the common connecting section in a second direction. The floating gate electrode film extends in the second direction and is formed on a first principal plane of a sheet-like semiconductor film via a tunnel dielectric film.

Claims (8)

1. A nonvolatile semiconductor memory device comprising sheet-like memory strings arranged in a matrix shape substantially perpendicularly to a substrate, wherein

each of the memory strings includes, in a height direction of a sheet-like semiconductor film, a plurality of memory cells each including a tunnel dielectric film, a floating gate electrode film, an inter-electrode dielectric film, and a control gate electrode film on a first principal plane of the sheet-like semiconductor film,

the control gate electrode film includes a common connecting section that connects the control gate electrode films of the memory cells at same height of the memory strings arranged in a first direction and extends in the first direction, and an electrode forming section that is provided for each of the memory cells above or below the floating gate electrode film via the inter-electrode dielectric film to project from the common connecting section in a second direction orthogonal to the first direction,

the floating gate electrode film has a shape extending in the second direction and is formed on the first principal plane of the sheet-like semiconductor film via the tunnel dielectric film, and

the memory cell has structure in which the floating gate electrode film is held, via the inter-electrode dielectric film, between the electrode forming sections of the upper and lower control gate electrode films.

2. The nonvolatile semiconductor memory device according to claim 1 , wherein the memory string further includes, via a gate insulating film, a back gate electrode film on a second principal plane on an opposite side of the first principal plane of the sheet-like semiconductor film.

3. The nonvolatile semiconductor memory device according to claim 1 , wherein air gaps are provided between the memory strings adjacent to each other in the first and second directions.

4. The nonvolatile semiconductor memory device according to claim 3 , wherein the control gate electrode film is a silicide film.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 18, 2012
From: KIYOTOSHI, MASAHIRO
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 027553/0778 →
Priority Claims (1)
JP 2011-092978 · Apr 19, 2011 · national
Continuity (1)
Related Publication 20120267699A1 · Oct 25, 2012