IP Library Granted Patent US 9,047,547
Granted Patent B2
US 9,047,547 · App. 13/353,850 · Granted Jun 2, 2015

Semiconductor memory card

Inventor: Takashi Okada (Kanagawa, JP)
Assignee: Kabushiki Kaisha Toshiba
G06K19/07743
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Quick Facts
Patent No.
US 9,047,547
App. No.
13/353,850
Granted
Jun 2, 2015
Kind
B2
Abstract

According to one embodiment, a semiconductor memory card includes a first pin group which includes a plurality of pins arranged in a line at an end portion on a side of an inserting direction into a connector and part of which is used both in a first and second modes; and a second pin group which includes a plurality of pins including at least two pin pairs for differential signal, is arranged so that a ground is positioned on both sides of each of the pin pairs for differential signal, and is used only in the second mode. In the second mode, among the respective pins configuring the first pin group, any of adjacent two pins are changed to a pin pair for differential clock signal, and a function of remaining pins of the first pin group is stopped.

Claims (25)

1. A semiconductor memory card that includes a semiconductor memory that is mounted on one surface of a substrate and a controller that is mounted on the other surface of the substrate and controls the semiconductor memory, and is capable of operating in a first mode and a second mode in which data is transferred at a higher speed than the first mode, comprising:

a first pin group which includes a plurality of pins arranged in a line at an end portion on a side of an inserting direction into a connector, which functions as four data pins, one command pin, one power source pin, one clock pin, and two ground pins in the first mode, and part of which is used both in the first and second modes; and

a second pin group which includes a plurality of pins including at least two pin pairs for differential signal, is arranged so that a ground is positioned on both sides of each of the pin pairs for differential signal, and is used only in the second mode, wherein

in the second mode, among the respective pins configuring the first pin group, any of adjacent two out of ones that function as the data pins, the command pin, and the clock pin in the first mode are changed to a pin pair for differential clock signal to function as the pin pair for differential clock signal, and a function of remaining pins of the first pin group is stopped.

2. The semiconductor memory card according to claim 1 , wherein the second pin group is arranged in approximately same direction as the first pin group at a position that is near a center in the inserting direction and near an end on an opposite side of the inserting direction.

3. The semiconductor memory card according to claim 2 , wherein the second pin group is arranged to be divided into a plurality of rows in the inserting direction.

4. The semiconductor memory card according to claim 1 , wherein the first pin group and the second pin group are arranged to sandwich a region on the substrate in which the controller is mounted.

5. The semiconductor memory card according to claim 1 , wherein each of the pins forming the second pin group is arranged without being offset in a direction perpendicular to the inserting direction with respect to the pins forming the first pin group.

6. The semiconductor memory card according to claim 1 , wherein the second pin group is arranged in a direction different from the first pin group.

7. The semiconductor memory card according to claim 1 , wherein the second pin group is arranged in approximately same direction as the first pin group adjacently to the first pin group.

8. The semiconductor memory card according to claim 7 , further comprising an upper case and a lower case that accommodates the substrate, wherein

the lower case includes a thin portion in a region facing a region in which the first and second pin groups are formed, and

the first and second pin groups are exposed outside the upper case and the lower case via an opening provided in the thin portion.

9. The semiconductor memory card according to claim 8 , wherein there is provided one said thin portion commonly to all of the pins of the first and second pin groups.

10. The semiconductor memory card according to claim 8 , wherein each of the pins forming the second pin group is arranged adjacently in the inserting direction with respect to the pins forming the first pin group, and the thin portion is formed commonly to a plurality of pins adjacent in the inserting direction.

11. The semiconductor memory card according to claim 1 , wherein an area of each of the pins forming the second pin group is smaller than an area of each of the pins forming the first pin group.

12. The semiconductor memory card according to claim 1 , wherein wires that connect respective pins for differential signal of the second pin group and the controller are formed on the substrate to have approximately equal length.

13. The semiconductor memory card according to claim 1 , wherein wires that connect respective pins for differential signal of the second pin group and the controller are formed approximately in parallel on the substrate for each of the pin pairs.

14. The semiconductor memory card according to claim 1 , wherein wires that connect respective pins for differential signal of the second pin group and the controller have approximately equal length and are formed approximately in parallel on the substrate for each of the pin pairs.

15. The semiconductor memory card according to claim 1 , wherein each wire that connects each of the four data pins of the first pin group and the controller, a wire that connects the clock pin and the controller, and a wire that connects the command pin and the controller are formed on the substrate to have approximately equal length.

16. The semiconductor memory card according to claim 1 , further comprising a case that accommodates the substrate, wherein

an outer shape of a side surface of the case is different from a case of a semiconductor memory card exclusively for the first mode at least at one part.

17. The semiconductor memory card according to claim 16 , wherein the case includes a notch for distinguishing from the case of the semiconductor memory card exclusively for the first mode.

18. The semiconductor memory card according to claim 1 , wherein at least one of a pin in the first pin group has a larger area than a pin of same function of the semiconductor memory card exclusively for the first mode.

19. The semiconductor memory card according to claim 1 , wherein the semiconductor memory is a NAND-type flash memory.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043709/0035 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2012
From: OKADA, TAKASHI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 027562/0364 →
Priority Claims (1)
JP 2009-172106 · Jul 23, 2009 · national
Continuity (2)
Continuation PCTJP2010062293 · Jul 14, 2010
Related Publication 20120117315A1 · May 10, 2012