Charging controlled RRAM device, and methods of making same
View Patent ↗Disclosed herein is a novel charging controlled RRAM (Resistance Random Access Memory), and various methods of making such a charging controlled RRAM device. In one example, a device disclosed herein includes a first word line structure formed above a substrate, wherein the first word line structure includes a gate electrode and a nano-crystal containing layer of insulating material, a second word line structure formed above the substrate, wherein the second word line structure comprises a gate electrode and a nano-crystal containing layer of insulating material, a first implant region formed in the substrate proximate the first word line structure, wherein the first implant region defines a first bit line, and a second implant region formed in the substrate proximate the second word line structure, wherein the second implant region defines a second bit line.
1. A method of forming a charging controlled RRAM device, comprising:
forming a first word line structure above a semiconducting substrate, wherein forming said first word line structure comprises:
forming a first layer of insulating material above said substrate;
performing a first ion implantation process to implant a first implant material into said first layer of insulating material;
forming a first layer of gate electrode material above said substrate; and
patterning said first layer of insulating material and said first layer of gate electrode material;
forming a second word line structure above said semiconducting substrate adjacent said first word line structure, wherein forming said second word line structure comprises:
forming a second layer of insulating material above said substrate and said patterned first layer of gate electrode material;
performing a second ion implantation process to implant a second implant material into said second layer of insulating material;
performing a heating process to form nano-crystals in said first and second layers of insulating material; and
after performing said heating process, forming a second layer of gate electrode material above said substrate;
forming a first implant region in said substrate proximate said first word line structure, said first implant region defining a first bit line; and
forming a second implant region in said substrate proximate said second word line structure, said second implant region defining a second bit line.
2. The method of claim 1 , wherein, prior to forming said second word line structure, forming at least one sidewall spacer adjacent said first word line structure and thereafter forming said second word line structure adjacent said at least one sidewall spacer.
3. The method of claim 1 , further comprising planarizing a surface of said second layer of gate electrode material.
4. The method of claim 1 , further comprising patterning said second layer of insulating material and said second layer of gate electrode material to define said second word line structure.
5. A method of forming a charging controlled RRAM device, comprising:
forming a first word line structure above a semiconducting substrate, said first word line structure comprising a gate electrode and a nano-crystal containing layer of insulating material;
forming at least one sidewall spacer adjacent said first word line structure;
after forming said at least one sidewall spacer, forming a second word line structure above said semiconducting substrate proximate said first word line structure, wherein said sidewall spacer is positioned between said first and second word line structures, said second word line structure comprising a gate electrode and a nano-crystal containing layer of insulating material;
performing at least one first ion implantation process to form a first implant region in said substrate proximate said first word line structure, said first implant region defining a first bit line; and
performing at least one second ion implantation process to form a second implant region in said substrate proximate said second word line structure, said second implant region defining a second bit line.
6. A method of forming a charging controlled RRAM device, comprising:
forming a first word line structure above a semiconducting substrate;
forming at least one sidewall spacer adjacent said first word line structure;
after forming said at least one sidewall spacer adjacent said first word line structure, forming a second word line structure above said semiconducting substrate adjacent said at least one sidewall spacer;
forming a first implant region in said substrate proximate said first word line structure, said first implant region defining a first bit line; and
forming a second implant region in said substrate proximate said second word line structure, said second implant region defining a second bit line.