IP Library › Granted Patent US 8,816,410
Granted Patent B2
US 8,816,410 · App. 13/357,381 · Granted Aug 26, 2014

Semiconductor device

Inventors: Wataru Saito (Kanagawa-ken, JP); Syotaro Ono (Hyogo-ken, JP); Toshiyuki Naka (Kanagawa-ken, JP); Shunji Taniuchi (Ishikawa-ken, JP); Miho Watanabe (Miyagi-ken, JP); Hiroaki Yamashita (Hyogo-ken, JP)
Assignee: Kabushiki Kaisha Toshiba
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Quick Facts
Patent No.
US 8,816,410
App. No.
13/357,381
Granted
Aug 26, 2014
Kind
B2
Abstract

A first semiconductor device of an embodiment includes a first semiconductor layer of a first conductivity type, a first control electrode, an extraction electrode, a second control electrode, and a third control electrode. The first control electrode faces a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type, and a fourth semiconductor layer of a first conductivity type, via a first insulating film. The second control electrode and the third control electrode are electrically connected to the extraction electrode, and face the second semiconductor layer under the extraction electrode, via the second insulating film. At least a part of the second control electrode and the whole of the third control electrode are provided under the extraction electrode. The electrical resistance of the second control electrode is higher than the electrical resistance of the third control electrode.

Claims (46)

1. A semiconductor device comprising:

a first semiconductor layer of a first conductivity type, the first semiconductor layer provided in a first region and a second region adjacent to the first region;

a second semiconductor layer of the first conductivity type provided on the first semiconductor layer in the first and second regions;

a third semiconductor layer of a second conductivity type selectively provided on a surface of the second semiconductor layer in the first region;

a fourth semiconductor layer of the first conductivity type selectively provided on a surface of the third semiconductor layer;

a first control electrode facing the second semiconductor layer in the first region, the third semiconductor layer, and the fourth semiconductor layer, via a first insulating film;

an extraction electrode provided on the second semiconductor layer in the second region and not provided on the second semiconductor layer in the first region;

a second control electrode and a third control electrode facing the second semiconductor layer under the extraction electrode via a second insulating film, and the first control electrode, the second control electrode, and the third control electrode being electrically connected to the extraction electrode, the third control electrode being electrically connected to the extraction electrode via the second control electrode;

a first main electrode connected to the first semiconductor layer;

a second main electrode connected to the third semiconductor layer and the fourth semiconductor layer; and

an electrical resistance of the second control electrode being higher than an electrical resistance of the third control electrode.

2. The semiconductor device according to claim 1 , wherein

the extraction electrode and the first control electrode are connected via a first contact layer, and

the extraction electrode and the second control electrode are connected via a second contact layer.

3. The device according to claim 1 , wherein a sheet resistance of the second control electrode or the third control electrode is higher than a sheet resistance of the first control electrode.

4. The device according to claim 1 , wherein a fifth semiconductor layer of the first conductivity type having an impurity concentration higher than an impurity concentration in the second semiconductor layer is further provided on the surface of the second semiconductor layer between the adjacent third semiconductor layers.

5. The device according to claim 1 , wherein a pattern formed by the second control electrode and the third control electrode is comb-shaped, when viewed from a direction perpendicular to a major surface of the first semiconductor layer.

6. The device according to claim 1 wherein a pattern formed by the third control electrode is spiral, when viewed from a direction perpendicular to a major surface of the first semiconductor layer.

7. The device according to claim 1 , wherein

a sixth semiconductor layer of the second conductivity type connected to the third semiconductor layer is further provided in the second semiconductor layer, and

the sixth semiconductor layer is provided periodically in a direction approximately parallel to a major surface of the first semiconductor layer.

8. The device according to claim 7 , wherein

the sixth semiconductor layer is not provided in the second region, and

an impurity concentration in the second semiconductor layer in the second region is lower than an impurity concentration in the second semiconductor layer in the first region.

9. The device according to claim 7 , wherein an impurity concentration in the second semiconductor layer and the sixth semiconductor layer in the second region is lower than an impurity concentration in the second semiconductor layer and the sixth semiconductor layer in the first region.

10. The device according to claim 7 , wherein a period with which the second semiconductor layer and the sixth semiconductor layer are alternately arranged in the second region is shorter than a period with which the second semiconductor layer and the sixth semiconductor layer are alternately arranged in the first region.

11. The device according to claim 1 , wherein the first control electrode is electrically connected to the extraction electrode via a contact layer, the second control electrode is electrically connected to the contact layer via a portion of the first control electrode, and the third control electrode is electrically connected to the contact layer via the second control electrode and the portion of the first control electrode in series.

12. A semiconductor device comprising:

a first semiconductor layer of a first conductivity type, the first semiconductor layer provided in a first region and a second region adjacent to the first region;

a second semiconductor layer of the first conductivity type provided on the first semiconductor layer in the first and second regions;

a third semiconductor layer of a second conductivity type selectively provided on a surface of the second semiconductor layer in the first region;

a fourth semiconductor layer of the first conductivity type selectively provided on a surface of the third semiconductor layer;

a first control electrode facing the second semiconductor layer in the first region, the third semiconductor layer, and the fourth semiconductor layer, via a first insulating film;

an extraction electrode provided on the second semiconductor layer in the second region and not provided on the second semiconductor layer in the first region;

a second control electrode and a third control electrode facing the second semiconductor layer under the extraction electrode via a second insulating film, and the third control electrode being electrically connected to the extraction electrode through the second control electrode;

a first main electrode connected to the first semiconductor layer; and

a second main electrode connected to the third semiconductor layer and the fourth semiconductor layer,

a first end of the second control electrode being electrically connected to the extraction electrode via a contact layer,

a second end of the second control electrode opposite to the first end of the second control electrode being connected to the third control electrode, and

an electrical resistance of the second control electrode being higher than an electrical resistance of the third control electrode.

13. The device according to claim 12 , wherein an area of the pattern of the third control electrode is larger than an area of the pattern of the second control electrode, when viewed from a direction perpendicular to a major surface of the first semiconductor layer.

14. The device according to claim 12 , wherein a width of the second control electrode is smaller than a width of the third control electrode in a direction perpendicular to a direction extending from the first end of the second control electrode toward the second end, when viewed from a direction perpendicular to a major surface of the first semiconductor layer.

15. The device according to claim 12 , wherein the third control electrode is composed of a plurality of divided parts electrically connected to each other.

16. The device according to claim 12 , wherein the third control electrode is in contact with the surface of the second semiconductor layer via the second insulating film in the second region.

17. The device according to claim 16 , wherein the third semiconductor layer is not provided on the surface of the second semiconductor layer immediately under a central part of the third control electrode in the second region.

18. The device according to claim 12 , wherein the first end of the second control electrode is electrically connected to the contact layer via a portion of the first control electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2012
From: SAITO, WATARU; ONO, SYOTARO; NAKA, TOSHIYUKI; TANIUCHI, SHUNJI; WATANABE, MIHO; YAMASHITA, HIROAKI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 028176/0167 →
Priority Claims (1)
JP 2011-014503 · Jan 26, 2011 · national
Continuity (1)
Related Publication 20120217555A1 · Aug 30, 2012