System and method for verifying the operating frequency of digital control circuitry
A system and method are presented for verifying the operating frequency of digital control circuitry. The system and method according to the present disclosure provide for a digitally controlled system, such as an electrosurgical system, to confirm or verify its operating frequency using a single external device, and software and/or firmware.
1. A method for verifying an operational frequency in a digital control circuitry, the method comprising:
operating an oscillator at a predetermined frequency;
inputting a first clock signal generated by the oscillator to the digital control circuitry via a first input;
determining the number of transitions of the first clock signal at the first input;
inputting a second clock signal to the digital control circuitry via a second input;
initiating a timed sequence where the number of transitions at the first input are counted over a predetermined number of control clock cycles at the second input; and
determining the operational frequency of the digital control circuitry using the predetermined number of clock cycles, the number of transitions of the first clock signal, and the predetermined frequency of the oscillator.
2. The method of claim 1 , wherein the step of determining the operational frequency includes determining the operational frequency by dividing the number of clock cycles by the number of transitions and then multiplying the result with the predetermined frequency of the oscillator.
3. The method of claim 1 , wherein the oscillator is an external oscillator relative to the digital control circuitry.
4. The method of claim 1 , wherein the second clock signal is generated by a control oscillator.
5. The method of claim 1 , wherein the digital control circuitry includes devices selected from the group consisting of microcontrollers, digital signal processors (DSPs), and field-programmable gate arrays (FPGAs).
6. The method of claim 1 , further comprising the step of selecting the predetermined frequency of the oscillator.
7. The method of claim 6 , wherein the step of selecting the predetermined frequency of the oscillator includes taking into account criteria selected from the group consisting of a clock rate corresponding to a system controlled by the digital control circuitry, absolute tolerance of the frequency of the system being controlled, and a rate at which verification of the operational frequency needs to take place.
8. A system for verifying an operational frequency in a digital control circuitry, the system comprising:
a first oscillator operating at a predetermined frequency; and
a second oscillator, wherein a first clock signal generated by the first oscillator is received by the digital control circuitry via a first input, and wherein a second clock signal generated by the second oscillator is received by the digital control circuitry via a second input;
means for initiating a timed sequence where a number of transitions at the first input are counted over a predetermined number of control clock cycles at the second input; and
means for determining the operational frequency of the digital control circuitry using the predetermined number of clock cycles, the number of transitions of the first clock signal, and the predetermined frequency of the oscillator.
9. The system of claim 8 , wherein the means for determining the operational frequency includes means for determining the operational frequency by dividing the number of clock cycles by the number of transitions and then multiplying the result with the predetermined frequency of the oscillator.
10. The system of claim 8 , wherein the first oscillator is an external oscillator relative to the digital control circuitry.
11. The system of claim 8 , wherein the digital control circuitry includes devices selected from the group consisting of microcontrollers, digital signal processors (DSPs), and field-programmable gate arrays (FPGAs).
12. The system of claim 8 , further comprising means for selecting the predetermined frequency of the oscillator.
13. The system of claim 12 , wherein the means for selecting the predetermined frequency of the oscillator includes taking into account criteria selected from the group consisting of a clock rate corresponding to a system controlled by the digital control circuitry, absolute tolerance of the frequency of the system being controlled, and a rate at which verification of the operational frequency needs to take place.