Semiconductor apparatus and method of fabrication for a semiconductor apparatus

1. A semiconductor apparatus comprising:

a semiconductor layer in the form of a wafer and a passivation layer arranged on a surface of the semiconductor layer and serving for passivating the semiconductor layer surface, wherein the passivation layer comprises a chemically passivating passivation sublayer and a field-effect-passivating passivation sublayer, which are arranged one above the other on the semiconductor layer surface;

wherein the chemically passivating passivation sublayer directly adjoins the field-effect-passivating passivation sublayer without further intermediate layers being arranged therebetween and wherein:

i) the field-effect-passivating passivation sublayer is substantially formed from a material having a negative surface charge density; and

ii) a covering layer comprising silicon nitride applied on the passivation layer.

2. The semiconductor apparatus as claimed in claim 1 , wherein the chemically passivating passivation sublayer is arranged between the semiconductor layer and the field-effect-passivating passivation sublayer on the semiconductor layer surface.

3. The semiconductor apparatus as claimed in claim 1 , wherein one of the passivation sublayers is formed in a manner free of pinholes.

4. The semiconductor apparatus as claimed in claim 1 , wherein the field-effect-passivating passivation sublayer is a layer deposited by atomic layer deposition, a layer deposited by CVD, a layer deposited by PECVD, a layer deposited by PVD or a sol-gel layer.

5. The semiconductor apparatus as claimed in claim 1 , wherein the field-effect-passivating passivation sublayer has a thickness in a range of between 0.1 and 10 nm.

6. The semiconductor apparatus as claimed in claim 1 , wherein the passivation layer is embodied as a reflection layer or as an antireflection layer.

7. The semiconductor apparatus as claimed in claim 1 , wherein the field-effect-passivating material or the field-effect-passivating passivation sublayer is substantially formed from a material having a surface charge density of at least 10 12 cm −2 .

8. The semiconductor apparatus as claimed in claim 1 , wherein the chemically passivating passivation sublayer comprises an amorphous semiconductor material or a semiconductor oxide.

9. The semiconductor apparatus as claimed in claim 1 , wherein the chemically passivating passivation sublayer is formed from a compound consisting of silicon with oxygen, nitrogen and/or carbon.

10. The semiconductor apparatus as claimed in claim 1 , wherein the passivation layer extends over substantially the entire semiconductor layer surface.

11. The semiconductor apparatus as claimed in claim 1 , further comprising a passivation on both sides of the semiconductor layer by means of the passivation layer.

12. The semiconductor apparatus as claimed in claim 1 , wherein the passivation layer has at the semiconductor layer surface an interface charge density of at most 10 13 cm −2 .

13. The semiconductor apparatus as claimed in claim 1 , wherein the chemically passivating passivation sublayer ( 31 ) has a layer thickness of at least 1 nm, 5 nm, 10 nm, 50 nm or 100 nm.

14. The semiconductor apparatus as claimed in claim 1 , wherein the chemically passivating passivation sublayer and/or the field-effect-passivating passivation sublayer are/is applied as a low-temperature layer.

15. A method of fabrication for a semiconductor apparatus, wherein a semiconductor layer in the form of a wafer is provided, having a semiconductor layer surface, and wherein a chemically passivating passivation sublayer and a field-effect-passivating passivation sublayer are applied successively on the semiconductor layer surface in order jointly to form a passivation layer, wherein the chemically passivating passivation sublayer and the field-effect-passivating passivation sublayer are applied such that chemically passivating passivation sublayer directly adjoins the field-effect-passivating passivation sublayer without further intermediate layers being arranged therebetween and wherein:

i) the field-effect-passivating passivation sublayer is substantially formed from a material having a negative surface charge density; and

ii) a covering layer comprising silicon nitride is applied on the passivation layer.

16. The method of fabrication as claimed in claim 15 , wherein the field-effect-passivating passivation sublayer is applied after the chemically passivating passivation sublayer has been applied.

17. The method of fabrication as claimed in claim 16 , wherein before the field-effect-passivating passivation sublayer is applied, the chemically passivating passivation sublayer applied is used as a diffusion barrier in a diffusion process, as an etching barrier in an etching process and/or as a texture barrier in a texture process.

18. The method of fabrication as claimed in claim 15 wherein the chemically passivating passivation sublayer and the field-effect-passivating passivation sublayer are applied in such a way that the passivation layer resulting therefrom acts as a reflection layer or as an antireflection layer.