IP Library Granted Patent US 8,823,015
Granted Patent B2
US 8,823,015 · App. 13/392,348 · Granted Sep 2, 2014

Silicon carbide epitaxial wafer and manufacturing method therefor

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Quick Facts
Patent No.
US 8,823,015
App. No.
13/392,348
Granted
Sep 2, 2014
Kind
B2
Abstract

Provided is a silicon carbide epitaxial wafer, the entire surface of which is free of step bunching. Also provided is a method for manufacturing said silicon carbide epitaxial wafer. The provided method for manufacturing a silicon carbide semiconductor device includes: a step wherein a 4H—SiC single-crystal substrate having an off-axis angle of 5° or less is polished until the lattice disorder layer on the surface of the substrate is 3 nm or less; a step wherein, in a hydrogen atmosphere, the polished substrate is brought to a temperature between 1400° C. and 1600° C. and the surface of the substrate is cleaned; a step wherein silicon carbide is epitaxially grown on the surface of the cleaned substrate as the amounts of SiH 4 gas and C 3 H 8 gas considered necessary for epitaxially growing silicon carbide are supplied simultaneously at a carbon-to-silicon concentration ratio between 0.7 and 1.2 to 1; and a step wherein the supply of SiH 4 gas and the supply of C 3 H 8 gas are cut off simultaneously, the substrate temperature is maintained until the SiH 4 gas and the C 3 H 8 gas are evacuated, and then the temperature is decreased.

Claims (10)

1. A SiC epitaxial wafer obtained by forming a SiC epitaxial layer on a 4H—SiC single-crystal substrate that is tilted at an off-angle of 0.4° to 5°, wherein when a surface of the SiC epitaxial wafer layer is measured by an optical surface inspection device that uses laser light, mean-square roughness Rq of the surface is 1.3 nm or less, and wherein linear density of steps of the epitaxial layer surface of the wafer is 5 mm −1 or less.

2. The SiC epitaxial wafer according to claim 1 , wherein the steps are connected to shallow pits due to screw dislocation in the SiC epitaxial layer.

3. A SiC epitaxial wafer obtained by forming a SiC epitaxial layer on a 4H—SiC single-crystal substrate that is tilted at an off-angle of 0.4° to 5°, wherein when a surface of the SiC epitaxial wafer layer is measured by an atomic force microscope, mean-square roughness Rq of the surface is 1.0 nm or less and a maximum height difference Ry is 3.0 nm or less.

4. A method of manufacturing a SiC epitaxial wafer comprising the steps of:

polishing a 4H—SiC single-crystal substrate that is tilted at an off-angle of 0.4° to 5° until a lattice disorder layer of a surface thereof becomes 3 nm or less;

cleaning the surface of the substrate after polishing at 1400 to 1600° C. in a hydrogen atmosphere;

performing epitaxial growth of silicon carbide on the surface of the substrate after the cleaning by simultaneously supplying SiH 4 gas and C 3 H 8 gas in the amount required for the epitaxial growth of the silicon carbide at a carbon-to-silicon (C/Si) concentration ratio of 0.7 to 1.2; and

simultaneously cutting off the supply of the SiH 4 gas and the C 3 H 8 gas, maintaining the substrate temperature until the SiH 4 gas and the C 3 H 8 gas are exhausted, and then decreasing the temperature.

5. The method of manufacturing a SiC epitaxial wafer according to claim 4 , wherein the cleaning step is performed by addition of SiH 4 gas and/or C 3 H 8 gas in the hydrogen atmosphere, and

the step of performing epitaxial growth is initiated after the added gases are exhausted.

Assignments (3)
CHANGE OF ADDRESS Recorded Feb 14, 2024
From: RESONAC CORPORATION
To: RESONAC CORPORATION
Reel/Frame 066599/0037 →
CHANGE OF NAME Recorded Jun 23, 2023
From: SHOWA DENKO K.K.
To: RESONAC CORPORATION
Reel/Frame 064082/0513 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2012
From: MOMOSE, KENJI; TAJIMA, YUTAKA; SAKAGUCHI, YASUYUKI; ODAWARA, MICHIYA; MIYASAKA, YOSHIHIKO
To: SHOWA DENKO K.K.
Reel/Frame 027760/0836 →