IP Library Granted Patent US 9,012,888
Granted Patent B2
US 9,012,888 · App. 13/406,705 · Granted Apr 21, 2015

Semiconductor light emitting device, wafer, method for manufacturing semiconductor light emitting device, and method for manufacturing wafer

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Quick Facts
Patent No.
US 9,012,888
App. No.
13/406,705
Granted
Apr 21, 2015
Kind
B2
Abstract

According to one embodiment, a semiconductor light emitting device includes a first layer of n-type and a second layer of p-type including a nitride semiconductor, a light emitting unit provided between the first and second layers, a first stacked structure provided between the first layer and the light emitting unit, and a second stacked structure provided between the first layer and the first stacked structure. The light emitting unit includes barrier layers and a well layer provided between the barrier layers. The first stacked structure includes third layers including a nitride semiconductor, and fourth layers stacked with the third layers and including GaInN. The fourth layers have a thinner thickness than the well layer. The second stacked structure includes fifth layers including a nitride semiconductor, and sixth layers stacked with the fifth layers and including GaInN. The sixth layers have a thinner thickness than the well layer.

Claims (47)

1. A semiconductor light emitting device comprising:

a first layer of n-type including a nitride semiconductor;

a second layer of p-type including a nitride semiconductor;

a light emitting unit provided between the first layer and the second layer and including a plurality of barrier layers and a well layer provided between the barrier layers;

a first stacked structure provided between the first layer and the light emitting unit, the first stacked structure including:

a plurality of third layers including AlGaInN; and

a plurality of fourth layers alternately stacked with the third layers, each of the fourth layers having a thickness thinner than a thickness of the well layer, and including GaInN; and

a second stacked structure provided between the first layer and the first stacked structure, the second stacked structure including:

a plurality of fifth layers including GaN; and

a plurality of sixth layers alternately stacked with the fifth layers, each of the sixth layers having a thickness thinner than the thickness of the well layer, and including GaInN;

wherein a Si concentration in a first barrier layer of the barrier layers nearest to the first stacked structure is higher than a Si concentration in the first stacked structure,

a Si concentration in the second stacked structure is lower than the Si concentration in the first stacked structure,

a Si concentration in the first layer is lower than the Si concentration in the second stacked structure,

a Si concentration in other barrier layers except the first barrier layer is lower than the Si concentration in the first barrier layer, and

the Si concentration in the first barrier layer is 1.2×10 19 cm −3 or more and 1.5×10 19 cm −3 or less.

2. The device according to claim 1 , wherein

a thickness of each of the third layers is thinner than a thickness of one of the barrier layers, and

a thickness of each of the fifth layers is thinner than the thickness of one of the barrier layers.

3. The device according to claim 1 , wherein a bandgap energy in the first barrier layer is larger than a bandgap energy in other barrier layers except the first barrier layer.

4. The device according to claim 1 , wherein a corresponding emission wavelength of the first stacked structure is 370 nanometers or more and 380 nanometers or less.

5. The device according to claim 1 , wherein sum of a total thickness of the fourth layers and the thickness of the well layer is 25 nanometers or more and 45 nanometers or less.

6. A wafer comprising:

a first layer of n-type including a nitride semiconductor;

a second layer of p-type including a nitride semiconductor;

a light emitting unit provided between the first layer and the second layer, the light emitting unit including a plurality of barrier layers and a well layer provided between the barrier layers;

a first stacked structure provided between the first layer and the light emitting unit, the first stacked structure including:

a plurality of third layers including AlGaInN; and

a plurality of fourth layers alternately stacked with the third layers, each of the fourth layers having a thickness thinner than a thickness of the well layer, and including GaInN; and

a second stacked structure provided between the first layer and the first stacked structure, the second stacked structure including:

a plurality of fifth including GaN; and

a plurality of sixth layers alternately stacked with the fifth layers, each of the sixth layers having a thickness thinner than the thickness of the well layer, and including GaInN;

wherein a Si concentration in a first barrier layer of the barrier layers nearest to the first stacked structure is higher than a Si concentration in the first stacked structure,

a Si concentration in the second stacked structure is lower than the Si concentration in the first stacked structure,

a Si concentration in the first layer is lower than the Si concentration in the second stacked structure,

a Si concentration in other barrier layers except the first barrier layer is lower than the Si concentration in the first barrier layer, and

the Si concentration in the first barrier layer is 1.2×10 19 cm −3 or more and 1.5×10 19 cm −3 or less.

7. The wafer according to claim 6 , wherein

a thickness of each of the third layers is thinner than a thickness of one of the barrier layers, and

a thickness of each of the fifth layers is thinner than the thickness of one of the barrier layers.

8. The device according to claim 1 , wherein a number of the third layers and a number of the fourth layers is 10 or more and 30 or less.

9. The device according to claim 1 , wherein the barrier layers include AlGaInN.

10. The wafer according to claim 6 , wherein a number of the third layers and a number of the fourth layers is 10 or more and 30 or less.

11. The wafer according to claim 6 , wherein

the barrier layers include AlGaInN.

12. The device according to claim 8 , wherein a bandgap energy in a first barrier layer of the barrier layers nearest to the first stacked structure is larger than a bandgap energy in other barrier layers except the first barrier layer of the barrier layers.

13. The device according to claim 8 , wherein a corresponding emission wavelength of the first stacked structure is 370 nanometers or more and 380 nanometers or less.

14. The device according to claim 8 , wherein sum of a total thickness of the fourth layers and the thickness of the well layer is 25 nanometers or more and 45 nanometers or less.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 6, 2020
From: TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
To: SEOUL SEMICONDUCTOR CO., LTD.
Reel/Frame 052316/0044 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2020
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA ELECTRONIC DEVICES AND STORAGE CORPORATION
Reel/Frame 051691/0442 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 1, 2012
From: KUSHIBE, MITSUHIRO; OHBA, YASUO; KATSUNO, HIROSHI; KANEKO, KEI; YAMADA, SHINJI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 028136/0250 →