Semiconductor device having c-axis aligned portions and doped portions
The semiconductor device includes an oxide semiconductor film having a first region and a pair of second regions facing each other with the first region provided therebetween, a gate insulating film over the oxide semiconductor film, and a first electrode overlapping with the first region, over the gate insulating film. The first region is a non-single-crystal oxide semiconductor region including a c-axis-aligned crystal portion. The pair of second regions is an oxide semiconductor region containing dopant and including a plurality of crystal portions.
1. A semiconductor device comprising:
an oxide semiconductor film including a first region, a second region, and a third region;
a gate insulating film over the oxide semiconductor film;
a gate electrode over the gate insulating film, the gate electrode overlapping with the first region;
a first electrode electrically connected to the second region; and
a second electrode electrically connected to the third region,
wherein the first region is interposed between the second region and the third region,
wherein the first region comprises a first c-axis-aligned crystal portion,
wherein each of the second region and the third region comprises an oxide semiconductor region containing a dopant, and
wherein each of the second region and the third region comprises a plurality of crystal portions and a second c-axis-aligned crystal portion over the plurality of crystal portions.
2. The semiconductor device according to claim 1 ,
wherein the gate electrode serves as a mask for preventing the dopant from being contained in the first region.
3. The semiconductor device according to claim 1 ,
wherein the dopant is selected from the group consisting of phosphorus, arsenic, antimony, and boron.
4. The semiconductor device according to claim 1 ,
wherein a dopant concentration of the second region and the third region is higher than or equal to 5×10 18 cm −3 and lower than or equal to 1×10 22 cm −3 .
5. A semiconductor device comprising:
an oxide semiconductor film including a first region, a second region, a third region, a fourth region, and a fifth region;
a gate insulating film over the oxide semiconductor film;
a gate electrode over the gate insulating film, the gate electrode overlapping with the first region;
a first electrode electrically connected to the second region; and
a second electrode electrically connected to the third region,
wherein the first region is interposed between the second region and the third region,
wherein the fourth region is interposed between the first region and the second region,
wherein the fifth region is interposed between the first region and the third region,
wherein the first region comprises a first c-axis-aligned crystal portion,
wherein each of the second region, the third region, the fourth region, and the fifth region comprises an oxide semiconductor region containing a dopant,
wherein a dopant concentration of the second region and the third region is higher than a dopant concentration of the fourth region and the fifth region, and
wherein each of the second region and the third region comprises a plurality of crystal portions and a second c-axis-aligned crystal portion over the plurality of crystal portions.
6. The semiconductor device according to claim 5 ,
wherein the gate electrode serves as a mask for preventing the dopant from being contained in the first region.
7. The semiconductor device according to claim 5 ,
wherein the dopant is selected from the group consisting of phosphorus, arsenic, antimony, and boron.
8. The semiconductor device according to claim 5 ,
wherein the dopant concentration of the second region and the third region is higher than or equal to 5×10 20 cm −3 and lower than or equal to 1×10 22 cm −3 , and
wherein the dopant concentration of the fourth region and the fifth region is higher than or equal to 5×10 10 cm −3 and lower than 5×10 21 cm −3 .
9. The semiconductor device according to claim 5 , further comprising a sidewall in contact with a side surface of the gate electrode,
wherein the sidewall is overlapped with the fourth region and the fifth region.
10. The semiconductor device according to claim 9 ,
wherein the gate insulating film is formed of an oxide insulator, and
wherein the sidewall is formed of a nitride insulator.
11. The semiconductor device according to claim 1 , wherein the dopant is coordinated to a Zn atom.
12. The semiconductor device according to claim 5 , wherein the dopant is coordinated to a Zn atom.