IP Library Granted Patent US 8,642,409
Granted Patent B2
US 8,642,409 · App. 13/424,071 · Granted Feb 4, 2014

Semiconductor device and method of manufacturing the same

Inventor: Keisuke Nakazawa (Yokohama, JP)
Assignee: Kabushiki Kaisha Toshiba
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Quick Facts
Patent No.
US 8,642,409
App. No.
13/424,071
Granted
Feb 4, 2014
Kind
B2
Abstract

According to one embodiment, there is provided a method of manufacturing a semiconductor device. In the method, a substrate portion and a fin portion on the substrate portion are formed. A first silicon oxide film is formed on each side surface of the fin portion. A polysilazane film having an upper surface lower than the upper surface of the first silicon oxide film is formed on each side surface of the first silicon oxide film. The polysilazane film is converted into a silicon oxynitride film. The first silicon oxide film is etched to make the upper surface of the first silicon oxide film not higher than the upper surface of the silicon oxynitride film. A heavily doped semiconductor layer is formed in the fin portion.

Claims (20)

1. A method of manufacturing a semiconductor device comprising:

forming, in a semiconductor substrate, a substrate portion and a fin portion on the substrate portion;

forming a first silicon oxide film on each side surface of the fin portion;

forming, on each side surface of the first silicon oxide film, a polysilazane film having an upper surface lower than an upper surface of the first silicon oxide film;

converting the polysilazane film into a silicon oxynitride film by nitriding and oxidizing the polysilazane film;

forming a second silicon oxide film on an entire surface to cover the fin portion;

etching the first silicon oxide film and the second silicon oxide film to make the upper surface of the first silicon oxide film not higher than an upper surface of the silicon oxynitride film; and

forming a heavily doped semiconductor layer in the fin portion.

2. The method of claim 1 , wherein nitriding of the polysilazane film is done by annealing in nitrogen, and oxidation of the polysilazane film is done by annealing in one of oxygen and steam.

3. The method of claim 2 , wherein the annealing in nitrogen is done at not less than 700° C., and the annealing in one of oxygen and steam is done at not less than 800° C.

4. The method of claim 1 , wherein the etching of the first silicon oxide film and the second silicon oxide film is done using a diluted hydrofluoric acid solution.

5. The method of claim 1 , wherein a concentration of nitrogen atoms in the silicon oxynitride film is not less than 10 20 atoms/cm 3 .

6. The method of claim 1 , wherein the heavily doped semiconductor layer is formed to be substantially flush with the upper surface of the first silicon oxide film.

7. The method of claim 1 , wherein the first silicon oxide film is formed by one of CVD and thermal oxidation.

8. The method of claim 1 , wherein the polysilazane film is formed by coating and subsequent baking.

9. The method of claim 1 , further comprising planarizing an upper side of the first silicon oxide film and the second silicon oxide film by CMP before the etching the first silicon oxide film and the second silicon oxide film.

10. The method of claim 1 , wherein the heavily doped semiconductor layer is formed by ion-implanting an impurity into the fin portion.

11. The method of claim 10 , wherein the semiconductor substrate is of p-type, and the impurity is arsenic.

12. The method of claim 10 , wherein the semiconductor substrate is of n-type, and the impurity is boron.

13. The method of claim 10 , further comprising annealing the heavily doped semiconductor layer after the ion implantation.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 11, 2017
From: TOSHIBA CORPORATION
To: MICROSOFT TECHNOLOGY LICENSING, LLC
Reel/Frame 041333/0955 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 22, 2012
From: NAKAZAWA, KEISUKE
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 027907/0832 →
Priority Claims (1)
JP 2011-179474 · Aug 19, 2011 · national
Continuity (1)
Related Publication 20130043563A1 · Feb 21, 2013