IP Library Granted Patent US 9,043,688
Granted Patent B1
US 9,043,688 · App. 13/427,599 · Granted May 26, 2015

Error data generation and application for disk drive applications

Inventors: Kai Keung Chan (Fremont, CA); Xin-Ning Song (San Jose, CA); Jason Bellorado (Santa Clara, CA); Kwok W. Yeung (Milpitas, CA)
Assignee: SK hynix memory solutions inc.
H03M13/41H03M13/4107H04L1/0054G11B20/10009H03M13/2957H04L1/0059
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Quick Facts
Patent No.
US 9,043,688
App. No.
13/427,599
Granted
May 26, 2015
Kind
B1
Abstract

Generating error data associated with decoding data is disclosed, including: processing an input sequence of samples associated with data stored on media using a detector and a decoder during a global iteration; and generating one or more error values based at least in part on one or more decision bits output by the detector or the decoder and the input sequence of samples.

Claims (39)

1. A method of generating error data associated with decoding data, comprising:

processing a first portion of an input sequence of samples associated with data stored on media using a detector and a decoder over a global iteration to generate a first set of decision bits;

generating one or more error values prior to the completion of the global iteration based at least in part on the first set of decision bits output by the detector or the decoder and the input sequence of samples, wherein generating the one or more error values includes:

generating an expected sequence based at least in part on the first set of decision bits; and

generating the one or more error values based at least in part on the input sequence and the expected sequence;

determining a second portion of the input sequence of samples that has not yet been processed by the detector and the decoder over the global iteration; and

using the one or more error values to modify at least the second portion of the input sequence of samples prior to inputting the second portion of the input sequence into the detector over the global iteration of processing using the detector and the decoder.

2. The method of claim 1 , wherein the media comprises hard disk.

3. The method of claim 1 , wherein the input sequence of samples is associated with a data sector.

4. The method of claim 1 , wherein the detector comprises a soft-output Viterbi algorithm (SOVA) detector.

5. The method of claim 1 , wherein the decoder comprises a low-density parity-code (LDPC) decoder.

6. The method of claim 1 , further comprising performing inter-track interference (ITI) cancellation on at least the second portion of the input sequence of samples.

7. The method of claim 6 , further comprising using the one or more error values to modify one or more computed ITI samples to cancel from the at least second portion of the input sequence of samples.

8. The method of claim 1 , further comprising receiving an indication associated with a trigger event configured to start error data generation, wherein the trigger event is configurable by a user.

9. The method of claim 8 , wherein the trigger event comprises one or more of the following: a start of a specific global iteration, a receipt of an indication associated with a specified type of feedback, and an invocation of a recovery procedure.

10. A system for generating error data associated with decoding data, comprising:

one or more processors configured to:

process a first portion of an input sequence of samples associated with data stored on media using a detector and a decoder over a global iteration to generate a first set of decision bits;

generate one or more error values prior to the completion of the global iteration based at least in part on the first set of decision bits output by the detector or the decoder and the input sequence of samples, wherein to generate the one or more error values includes to:

generate an expected sequence based at least in part on the first set of decision bits; and

generate the one or more error values based at least in part on the input sequence and the expected sequence;

determine a second portion of the input sequence of samples that has not yet been processed by the detector and the decoder over the global iteration; and

use the one or more error values to modify at least the second portion of the input sequence of samples prior to inputting the second portion of the input sequence into the detector over the global iteration of processing using the detector and the decoder; and

a memory coupled to the one or more processors and configured to provide the one or more processors with instructions.

11. The system of claim 10 , wherein the one or more processors are further configured to receive an indication associated with a trigger event configured to start error data generation, wherein the trigger event is configurable by a user.

12. The system of claim 11 , wherein the trigger event comprises one or more of the following: a start of a specific global iteration, a receipt of an indication associated with a specified type of feedback, and an invocation of a recovery procedure.

13. The system of claim 10 , wherein the one or more processors are further configured to perform inter-track interference (ITI) cancellation on at least the second portion of the input sequence of samples.

14. The system of claim 13 , further comprising using the one or more error values to modify one or more computed ITI samples to cancel from the at least second portion of the input sequence of samples.

15. A computer program product for generating error data associated with decoding data, the computer program product being embodied in a non-transitory computer readable medium and comprising computer instructions for:

processing a first portion of an input sequence of samples associated with data stored on media using a detector and a decoder over a global iteration to generate a first set of decision bits;

generating one or more error values prior to the completion of the global iteration based at least in part on the first set of decision bits output by the detector or the decoder and the input sequence of samples, wherein generating the one or more error values includes:

generating an expected sequence based at least in part on the first set of decision bits; and

generating the one or more error values based at least in part on the input sequence and the expected sequence;

determining a second portion of the input sequence of samples that has not yet been processed by the detector and the decoder over the global iteration; and

using the one or more error values to modify at least the second portion of the input sequence of samples prior to inputting the second portion of the input sequence into the detector over the global iteration of processing using the detector and the decoder.

16. The computer program product of claim 15 , further comprising receiving an indication associated with a trigger event configured to start error data generation, wherein the trigger event is configurable by a user.

17. The computer program product of claim 16 , wherein the trigger event comprises one or more of the following: a start of a specific global iteration, a receipt of an indication associated with a specified type of feedback, and an invocation of a recovery procedure.

18. The computer program product of claim 15 , further comprising performing inter-track interference (ITI) cancellation on at least the second portion of the input sequence of samples.

19. The computer program product of claim 18 , further comprising using the one or more error values to modify one or more computed ITI samples to cancel from the at least second portion of the input sequence of samples.

Assignments (2)
CHANGE OF NAME Recorded Feb 26, 2013
From: LINK_A_MEDIA DEVICES CORPORATION
To: SK HYNIX MEMORY SOLUTIONS INC.
Reel/Frame 029881/0775 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2012
From: CHAN, KAI KEUNG; SONG, XIN-NING; BELLORADO, JASON; YEUNG, KWOK W.
To: LINK_A_MEDIA DEVICES CORPORATION
Reel/Frame 028161/0407 →
Continuity (1)
Provisional Application 61467927 · Mar 25, 2011