Apparatuses and methods using negative voltages in part of memory write read, and erase operations
View Patent ↗Some embodiments include apparatuses and methods having a memory cell string that can include memory cells located in different levels of the apparatus. The memory cell string can include a body associated with the memory cells. At least one of such embodiments can include a module configured to apply a negative voltage to at least a portion of the body of the memory cell string during an operation of the apparatus. The operation can include a read operation, a write operation, or an erase operation. Other embodiments are described.
1. A method comprising:
storing information, during a first stage of a write operation, in a selected memory cell among memory cells of a memory cell string, the memory cells of the string formed over a substrate and located in different levels of a device in a direction perpendicular from substrate, the memory cell string including a body of the memory cells, the body of the memory cells located outside the substrate;
determining, during a second stage of the write operation, whether a value of the information stored in the selected memory cell reaches a target value;
applying a negative voltage to at least a portion of the body of the memory cell string during a time interval between the first and second stages of the write operation, wherein applying the negative voltage to at least the portion of the body of the memory cell string comprises applying the negative voltage through at least a portion of a source coupled to the body of the memory cell string; and
decoupling the negative voltage from the body of the memory string in the second stage of the write operation during determining of whether the value of the information stored in the selected memory cell reaches the target value.
2. The method of claim 1 , wherein the determining includes sensing the memory cell to obtain the value of the information stored in the selected memory cell, and comparing the obtained value with the target value.
3. The method of claim 2 , wherein the obtained value of the information is based in part on a threshold voltage of the selected memory cell.
4. The method of claim 1 , further comprising:
applying another negative voltage to the portion of the body of the memory cell string after the second stage of the operation.
5. A method comprising:
storing information, during a first stage of a write operation, in a selected memory cell among memory cells of a memory cell string, the memory cells of the string formed over a substrate and located in different levels of a device in a direction perpendicular from substrate, the memory cell string including a body of the memory cells, the body of the memory cells located outside the substrate;
determining, dining a second stage of the write operation, whether a value of the information stored in the selected memory cell reaches a target value;
applying a negative voltage to at least a portion of the body of the memory cell string during a time interval between the first and second stages, wherein applying the negative voltage to at least the portion of the body of the memory cell string comprises applying the negative voltage through at least a portion of a data line coupled to the body of the memory cell string; and
decoupling the negative voltage from the body of the memory string in the second stage of the write operation during determining of whether the value of the information stored in the selected memory cell reaches the target value.
6. The method of claim 5 , further comprising:
repeating the storing, the determining, and the applying if the value of the information stored in the memory cell is outside a target value range.
7. The method of claim 5 , wherein applying the negative voltage comprises applying a negative voltage having a value less than a negative built-in potential of a p-n junction between a first material and a second material of the body of memory cell string.