IP Library › Granted Patent US 8,618,667
Granted Patent B2
US 8,618,667 · App. 13/443,869 · Granted Dec 31, 2013

Semiconductor device and method of manufacturing the same

Inventors: Kenichi Takeda (Higashimurayama, JP); Mayu Aoki (Kokubunji, JP); Kazuyuki Hozawa (Hino, JP)
Assignee: Hitachi, Ltd.
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Quick Facts
Patent No.
US 8,618,667
App. No.
13/443,869
Granted
Dec 31, 2013
Kind
B2
Abstract

A bump electrode, a dummy bump, and a heat-resistant polymer film, whose upper-surface heights are uniformed, are formed on each of a first silicon substrate and a second silicon substrate, and then, the first silicon substrate and the second silicon substrate are bonded to each other so that the bump electrodes formed on the respective substrates are electrically connected to each other. At this time, the dummy bump is arranged so as to be bonded to the heat-resistant polymer film on the silicon substrate opposed thereto, so that a semiconductor device having both of good electrical connection between the bump electrodes and bump protection performance obtained by a polymer film with high heat resistance and without voids can be achieved.

Claims (18)

1. A semiconductor device comprising: a first substrate on whose one surface a first electrode and a first insulating film are formed; and a second substrate on whose one surface a second electrode and a second insulating film are formed, and the first substrate and the second substrate being layered and being electrically connected to each other by bonding the one surface of the first substrate and the one surface of the second substrate, wherein

the first electrode is formed in a first region of the first insulating film, a first dummy bump made of the same material as a material of the first electrode is formed in a second region of the first insulating film, the second electrode is formed in a first region of the second insulating film, and a second dummy bump made of the same material as a material of the second electrode is formed in a second region of the second insulating film,

in a direction vertical to the one surface of the first substrate, a distance from the one surface of the first substrate to an upper surface of the first electrode, a distance from the one surface of the first substrate to an upper surface of the first dummy bump, and a distance from the one surface of the first substrate to an upper surface of the first insulating film are equal to each other,

in a direction vertical to the one surface of the second substrate, a distance from the one surface of the second substrate to an upper surface of the second electrode, a distance from the one surface of the second substrate to an upper surface of the second dummy bump, and a distance from the one surface of the second substrate to an upper surface of the second insulating film are equal to each other,

the first dummy bump is in contact with the second insulating film, and the second dummy bump is in contact with the first insulating film, and

the first insulating film and the second insulating film contain at least one of polyimide, polybenzoxazole, and benzocyclobutene.

2. The semiconductor device according to claim 1 , wherein

each of the first substrate and the second substrate is a semiconductor wafer or a semiconductor chip.

3. The semiconductor device according to claim 1 , wherein

each of the first insulating film and the second insulating film contains heat-resistant polymer.

4. The semiconductor device according to claim 1 , wherein

each of the first insulating film and the second insulating film contains photosensitive polymer.

5. The semiconductor device according to claim 1 , wherein

each of the first electrode, the first dummy bump, the second electrode, and the second dummy bump contains copper.

6. The semiconductor device according to claim 1 , wherein

a planar layout shape of each of the first dummy bump and the second dummy bump is quadrangle, hexagon, octagonal, hexadecagon, circle, cross shape, L shape, or T shape.

7. The semiconductor device according to claim 1 , wherein

both of the shortest distance between the first electrode and the first dummy bump and the shortest distance between the first dummy bumps are less than 5 times the shortest distance between the first electrodes.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2012
From: TAKEDA, KENICHI; AOKI, MAYU; HOZAWA, KAZUYUKI
To: HITACHI, LTD.
Reel/Frame 028049/0695 →
Priority Claims (1)
JP 2011-087061 · Apr 11, 2011 · national
Continuity (1)
Related Publication 20120256311A1 · Oct 11, 2012