IP Library Granted Patent US 9,105,537
Granted Patent B2
US 9,105,537 · App. 13/444,809 · Granted Aug 11, 2015

Multi-junction photodiode in application of molecular detection and discrimination, and method for fabricating the same

Inventors: Chiun-Lung Tsai (New Taipei, TW); Jui-Feng Huang (Hsinchu, TW); Ming-Fang Hsu (Hsinchu County, TW); Chih-Yang Chen (New Taipei, TW)
Assignee: Personal Genomics, Inc.
H01L27/14607H01L27/1461H01L27/1463H01L27/14647H01L27/14689
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Quick Facts
Patent No.
US 9,105,537
App. No.
13/444,809
Granted
Aug 11, 2015
Kind
B2
Abstract

A multi-junction photodiode for molecular detection and discrimination and fabrication methods thereof. The multi junction photodiode includes a substrate having first conductive type dopants, an epitaxial layer having the first conductive type dopants, a deep well having second conductive type dopants, a first well having the first conductive type dopants, a second well having the second conductive type dopants, a third well having the first conductive type dopants, and a first doped region having the second conductive type dopants. The epitaxial layer is disposed on the substrate. The deep well is disposed in the epitaxial layer. The first well having three sides connected to the epitaxial layer is disposed in the deep well. The second well is disposed in the first well. The third well having three sides connected to the epitaxial layer is disposed in the second well. The first doped region is disposed in the third well.

Claims (66)

1. A semiconductor device, comprising:

a substrate having first conductive type dopants;

an epitaxy layer having the first conductive type dopants, disposed on the substrate;

a deep well region having second conductive type dopants, disposed in the epitaxy layer;

a first well region having the first conductive type dopants, disposed in the deep well region, and three sides of the first well region are in contact with the epitaxy layer;

a second well region having the second conductive type dopants, disposed in the first well region;

a third well region having the first conductive type dopants, disposed in the second well region, and three sides of the third well region are in direct contact with the epitaxy layer; and

a first doped region having the second conductive type dopants, disposed in the third well region.

2. The semiconductor device of claim 1 , further comprising a fourth well region having the second conductive type dopants disposed in the second well region, wherein the fourth well region has a doping concentration larger than that of the second well region.

3. The semiconductor device of claim 1 , further comprising a fifth well region having the second conductive type dopants disposed in the deep well region, wherein the fifth well region has a doping concentration larger than that of the deep well region.

4. The semiconductor device of claim 1 , further comprising a sixth well region having the first conductive type dopants disposed in the epitaxy layer and outside an edge of the deep well region.

5. The semiconductor device of claim 4 , further comprising a seventh well region having the second conductive type dopants disposed in the epitaxy layer and outside an edge of the sixth well region.

6. The semiconductor device of claim 1 , further comprising a second doped region having the first conductive type dopants disposed in an upper part of the deep well region.

7. The semiconductor device of claim 1 , wherein when the first conductive type dopants are p type, the second conductive type dopants are n type; when the first conductive type dopants are n type, the second conductive type dopants are p type.

8. A semiconductor device, comprising:

a substrate having first conductive type dopants;

an epitaxy layer having the first conductive type dopants, disposed on the substrate;

a deep well region having second conductive type dopants, disposed in the epitaxy layer;

a first layer region and a second layer region having the first conductive type dopants, disposed in the deep well region, and three sides of the first layer region and three sides of the second layer region are respectively in direct contact with the epitaxy layer, wherein the second layer region is located above and unconnected to the first layer region;

at least a third layer region having the first conductive type dopants, disposed in the deep well region, wherein the third layer region is located above the first layer region to connect the first layer region to a top surface of the epitaxy layer; and

a fourth layer region having the first conductive type dopants, disposed in the deep well region, wherein the fourth layer region is located above the second layer region to connect the second layer region to the top surface of the epitaxy layer.

9. The semiconductor device of claim 8 , further comprising a first doped region having the second conductive type dopants disposed in the deep well region, wherein the first doped region is located above the second layer region and the first doped region has a doping concentration larger than that of the deep well region.

10. The semiconductor device of claim 8 , further comprising at least a first well region having the second conductive type dopants disposed in the deep well region, wherein the first well region has a doping concentration larger than that of the deep well region.

11. The semiconductor device of claim 8 , further comprising a second well region having the first conductive type dopants disposed in the epitaxy layer and outside an edge of the deep well region.

12. The semiconductor device of claim 11 , further comprising a third well region having the second conductive type dopants, disposed in the epitaxy layer and outside an edge of the second well region.

13. The semiconductor device of claim 8 , further comprising a second doped region having the first conductive type dopants disposed in an upper part of the deep well region.

14. The semiconductor device of claim 8 , wherein when the first conductive type dopants are p type, the second conductive type dopants are n type; when the first conductive type dopants are n type, the second conductive type dopants are p type.

15. A semiconductor device, comprising:

a substrate having first conductive type dopants;

an epitaxy layer having the first conductive type dopants, disposed on the substrate;

a deep well region having second conductive type dopants, disposed in the epitaxy layer;

a first layer region having the first conductive type dopants, disposed in the deep well region, and three sides of the first layer region are in direct contact with the epitaxy layer;

at least a second layer region having the first conductive type dopants, disposed in the deep well region, wherein the second layer region is located above the first layer region to connect the first layer region to a top surface of the epitaxy layer;

a first well region having the first conductive type dopants, disposed in the deep well region, wherein the first well region is located above and unconnected to the first layer region, and three sides of the first well region are in direct contact with the epitaxy layer; and

a first doped region having the second conductive type dopants, disposed in the first well region.

16. The semiconductor device of claim 15 , further comprising at least a second well region having the second conductive type dopants disposed in the deep well region, wherein the second well region has a doping concentration larger than that of the deep well region.

17. The semiconductor device of claim 15 , further comprising a third well region having the first conductive type dopants disposed in the epitaxy layer and outside an edge of the deep well region.

18. The semiconductor device of claim 17 , further comprising a fourth well region having the second conductive type dopants, disposed in the epitaxy layer and outside an edge of the third well region.

19. The semiconductor device of claim 15 , further comprising a second doped region having the first conductive type dopants disposed in an upper part of the deep well region.

20. The semiconductor device of claim 15 , wherein when the first conductive type dopants are p type, the second conductive type dopants are n type; when the first conductive type dopants are n type, the second conductive type dopants are p type.

21. A fabrication method of a semiconductor device, comprising:

providing a substrate having first conductive type dopants;

forming an epitaxy layer having the first conductive type dopants on the substrate;

forming a deep well region having second conductive type dopants in the epitaxy layer;

forming a first well region having the first conductive type dopants in the deep well region, wherein three sides of the first well region are in direct contact with the epitaxy layer;

forming a second well region having the second conductive type dopants in the first well region;

forming a third well region having the first conductive type dopants in the second well region, wherein three sides of the third well region are in direct contact with the epitaxy layer; and

forming a first doped region having the second conductive type dopants in the third well region.

22. The method of claim 21 , wherein when the first conductive type dopants are p type, the second conductive type dopants are n type; when the first conductive type dopants are n type, the second conductive type dopants are p type.

23. A fabrication method of a semiconductor device, comprising:

providing a substrate having first conductive type dopants;

forming an epitaxy layer having the first conductive type dopants on the substrate;

forming a deep well region having second conductive type dopants in the epitaxy layer;

forming a first layer region and a second layer region having the first conductive type dopants in the deep well region, wherein the second layer region is formed above and unconnected with the first layer region, three sides of the first layer region and three sides of the second layer region are respectively in direct contact with the epitaxy layer;

forming at least a third layer region having the first conductive type dopants in the deep well region, wherein the third layer region is formed above the first layer region to connect the first layer region to the top surface of the epitaxy layer; and

forming a fourth layer region having the first conductive type dopants in the deep well region, wherein the fourth layer region is formed above the second layer region to connect the second layer region to a top surface of the epitaxy layer.

24. The method of claim 23 , wherein when the first conductive type dopants are p type, the second conductive type dopants are n type; when the first conductive type dopants are n type, the second conductive type dopants are p type.

25. A fabrication method of a semiconductor device, comprising:

providing a substrate having first conductive type dopants;

forming an epitaxy layer having the first conductive type dopants on the substrate;

forming a deep well region having second conductive type dopants in the epitaxy layer;

forming a first layer region having the first conductive type dopants in the deep well region, wherein three sides of the first layer region are in direct contact with the epitaxy layer;

forming at least a second layer region having the first conductive type dopants in the deep well region, wherein the second layer region is formed above the first layer region to connect the first layer region to a top surface of the epitaxy layer;

forming a first well region having the first conductive type dopants in the deep well region, wherein the first well region is formed above and unconnected with the first layer region, and three sides of the first well region are in direct contact with the epitaxy layer; and

forming a first doped region having the second conductive type dopants in the first well region.

26. The method of claim 25 , wherein when the first conductive type dopants are p type, the second conductive type dopants are n type; when the first conductive type dopants are n type, the second conductive type dopants are p type.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Apr 7, 2022
From: SENDAI INVESTMENTS COMPANY INC.; TRINITY OVERSEAS HOLDINGS LIMITED
To: PERSONAL GENOMICS, INC.
Reel/Frame 059523/0540 →
INTELLECTUAL PROPERTY AGREEMENT Recorded Sep 11, 2018
From: PERSONAL GENOMICS, INC.
To: SENDAI INVESTMENTS COMPANY INC.; TRINITY OVERSEAS HOLDINGS LIMITED
Reel/Frame 047044/0787 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2014
From: TI-SHIUE BIOTECH, INC.
To: PERSONAL GENOMICS, INC.
Reel/Frame 033113/0966 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2012
From: TSAI, CHIUN-LUNG; HUANG, JUI-FENG; HSU, MING-FANG; CHEN, CHIH-YANG
To: TI-SHIUE BIOTECH, INC.
Reel/Frame 028039/0269 →
Priority Claims (1)
TW 100139395 A · Oct 28, 2011 · national
Continuity (1)
Related Publication 20130105945A1 · May 2, 2013