Schottky diode with opposite-polarity schottky diode field guard ring
In one general aspect, an apparatus includes a metal or metal silicide contact layer disposed on an n-well region of a semiconductor substrate to form a primary Schottky diode. The apparatus includes a p-well guard ring region of the semiconductor substrate abutting the primary Schottky diode. The metal silicide contact layer has a perimeter portion extending over the p-well guard ring region of the semiconductor substrate and the p-well guard ring region has a doping level establishing a work function difference relative to the perimeter portion of the metal silicide contact layer to form a guard ring Schottky diode. The guard ring Schottky diode is in series with a p-n junction interface of the p-well region and the n-well region and the guard ring Schottky diode has a polarity opposite to that of the primary Schottky diode.
1. An apparatus, comprising:
an insulating element abutting a surface area of a silicon substrate;
an n-well region disposed in the silicon substrate;
a p-well guard ring region disposed in the silicon substrate between the n-well region and the insulating element; and
a conductive layer disposed on the surface area of the silicon substrate, the conductive layer having a middle portion and an edge portion, the middle portion of the conductive layer forming an n-type rectifying contact with the n-well region of the silicon substrate, the middle portion of the conductive layer and the n-well region forming an n-type Schottky diode,
the edge portion of the conductive layer forming a p-type rectifying contact with the p-well guard ring region, the p-type rectifying contact abutting the n-type rectifying contact, the p-type rectifying contact extending from the n-type rectifying contact and abutting the insulating element, the edge portion of the conductive layer and the p-well guard ring region forming a p-type guard ring Schottky diode electrically in parallel with the n-type Schottky diode;
an anode structure disposed over the surface area of the silicon substrate in electrical contact with the conductive layer, the anode structure forming a first terminal of the p-type guard ring Schottky diode electrically in parallel with the n-type Schottky diode.
2. The apparatus of claim 1 , wherein the n-well region, the p-well guard ring region and conductive layer are configured so that when the n-type Schottky diode is forward biased, the p-type guard ring Schottky diode is reverse biased electrically disconnecting the p-well guard ring region from the conductive layer to inhibit parasitic bipolar transistor action between the p-well guard ring region, the n-well region, and the silicon substrate.
3. The apparatus of claim 1 , wherein the n-well region, the p-well guard ring region and the conductive layer are configured so that when then-type Schottky diode is reverse biased, the p-type guard ring Schottky diode is forward biased to reverse bias a p-n junction interface of the p-well guard ring region and the n-well region to inhibit edge electric fields and increase a breakdown voltage of the n-type Schottky diode.
4. The apparatus of claim 3 , wherein the n-well region has a donor dopant concentration of about 10 14 to 10 16 atoms/cm 3 .
5. The apparatus of claim 3 , wherein the p-well guard ring region has an acceptor dopant concentration of about 10 16 atoms/cm 3 or less.
6. The apparatus of claim 5 , wherein the conductive layer is at least one of a cobalt silicide layer, a titanium silicide layer, a platinum silicide layer and a palladium silicide layer.
7. An electronic device, comprising:
a semiconductor substrate having a surface contact area with an outer edge defined by an insulating element disposed on the semiconductor substrate, the semiconductor substrate having a doped well region and an oppositely-doped well region underlying the surface contact area; and
a conductive layer disposed on the surface contact area, the conductive layer having a middle portion and an edge portion, both the middle portion and the edge portion being in contact with the semiconductor substrate, the edge portion extending laterally from the middle portion to the outer edge of the surface contact area,
the middle portion of the conductive layer forming a first rectifying contact with the doped well region of the semiconductor substrate, the middle portion of the conductive layer and the doped well region forming a primary Schottky diode,
the edge portion of the conductive layer forming a second rectifying contact with the oppositely-doped well region of the semiconductor substrate, the second rectifying contact extending continuously from the first rectifying contact to the outer edge of the surface contact area and abutting the insulating element, the edge portion of the conductive layer and the oppositely-doped well region forming a guard ring Schottky diode in parallel with the primary Schottky diode and in series with a p-n junction interface of the doped well region and the oppositely-doped well region of the semiconductor substrate, the guard ring Schottky diode having a polarity opposite a polarity of the primary Schottky diode.
8. The electronic device of claim 7 , wherein the doped well region, the oppositely-doped well region, and the semiconductor substrate are configured so that when the primary Schottky diode is forward biased the guard ring Schottky diode is reverse biased electrically disconnecting the oppositely-doped guard ring well region from the conductive layer to inhibit parasitic bipolar transistor action between the oppositely-doped well region, the doped well region, and the semiconductor substrate.
9. The electronic device of claim 7 , wherein the doped well region, the oppositely-doped well region, and the semiconductor substrate are configured so that when the primary Schottky diode is reverse biased, the guard ring Schottky diode is forward biased so as to reverse bias the p-n junction interface of the doped and oppositely-doped guard ring well regions to inhibit edge electric fields at the conductive layer and increase a breakdown voltage of the primary Schottky diode.
10. The electronic device of claim 7 , wherein the doped well region is an n-well region of the semiconductor substrate and the primary Schottky diode is an n-type Schottky diode, and the oppositely-doped well region is a p-well region of the semiconductor substrate and the guard ring Schottky diode is a p-type Schottky diode.
11. The electronic device of claim 7 , wherein the doped well region is a p-well region of the semiconductor substrate and the primary Schottky diode is a p-type Schottky diode, and the oppositely-doped well region is an n-well region of the semiconductor substrate and the guard ring Schottky diode is an n-type Schottky diode.
12. The electronic device of claim 7 , wherein the semiconductor substrate is a silicon substrate, and wherein the doped well region has a donor concentration of about 10 14 to 10 16 atoms/cm 3 .
13. The electronic device of claim 7 , wherein the semiconductor substrate is a silicon substrate, and wherein the oppositely-doped well region has an acceptor concentration of about 10 16 atoms/cm 3 or less.
14. The electronic device of claim 7 , wherein the conductive layer is a cobalt silicide layer.
15. The electronic device of claim 7 , wherein the conductive layer is at least one of aluminum, gold, molybdenum, palladium silicide, platinum silicide, titanium silicide and/or a cobalt silicide layer.