IP Library › Granted Patent US 8,987,122
Granted Patent B2
US 8,987,122 · App. 13/453,039 · Granted Mar 24, 2015

Method of manufacturing semiconductor device

Inventors: Kazunari Nakata (Tokyo, JP); Tamio Matsumura (Tokyo, JP)
Assignee: Mitsubishi Electric Corporation
H01L21/304B24B41/068B24B7/228H01L29/0657
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Quick Facts
Patent No.
US 8,987,122
App. No.
13/453,039
Granted
Mar 24, 2015
Kind
B2
Abstract

A method of manufacturing a semiconductor device, includes a wafer grinding step of, by means of a revolving grinding stone, forming a thinned portion in a wafer while at the same time forming a slope surrounding said thinned portion, wherein during said formation of said slope, said grinding stone is positioned so that there is always a space between said slope and the facing side of said grinding stone, wherein said thinned portion is thinner than a peripheral portion of said wafer, and wherein said slope extends along and defines an inner circumferential side of said peripheral portion and forms an angle of 75° or more but less than 90° with respect to a main surface of said wafer. The method of manufacturing a semiconductor device further includes a step of forming a semiconductor device in said thinned portion.

Claims (13)

1. A method of manufacturing a semiconductor device, comprising:

a wafer grinding step of, using a revolving grinding stone, forming a thinned portion in a wafer and simultaneously forming a slope surrounding said thinned portion, wherein during said formation of said slope, said grinding stone is positioned so that there is always a space between said slope and a side of said grinding stone facing said slope,

wherein said thinned portion is thinner than a peripheral portion of said wafer,

wherein said slope extends along and defines an inner circumferential side of said peripheral portion and forms an angle of 75° or more but less than 90° with respect to a main surface of said wafer, and

wherein a variation of thickness of said thinned portion of said wafer is at or about a constant value for any of said angles of 75° or more but less than 90°; and

a step of forming a semiconductor device on said thinned portion.

2. The method according to claim 1 , wherein said step of forming said semiconductor device includes a photolithography process, an ion implantation process, a thermal diffusion process, a film formation process, or an etching process.

3. The method according to claim 1 , wherein said step of forming said semiconductor device includes forming a first electrode on a top surface of said thinned portion and a second electrode on a bottom surface of said thinned portion.

4. The method according to claim 1 , wherein a number of chippings, a number of stains, and said variation in thickness of said thinned portion of said wafer are dependent on said formed angle.

5. The method according to claim 1 , further comprising:

rotating said stage in a first direction opposite to a second direction of rotation of said revolving grinding stone while forming said thinned portion.

6. The method according to claim 1 , wherein a thickness of said thinned portion of said wafer is between 50μm and 60μm.

7. The method according to claim 1 , wherein said constant value is 2.5μm.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 23, 2012
From: NAKATA, KAZUNARI; MATSUMURA, TAMIO
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 028088/0539 →
Priority Claims (1)
JP 2011-184441 · Aug 26, 2011 · national
Continuity (1)
Related Publication 20130052812A1 · Feb 28, 2013