IP Library Patent Application 13454669
Patent Application
App. No. 13/454,669

APPARATUSES AND METHODS FOR BITSTREAM BITSTUFFING

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Quick Facts
Patent No.
US None
App. No.
13/454,669
Abstract

Examples of methods and apparatuses for inserting and removing stuffing data in a bitstream described. An encoding system may include an encoder configured to receive a video signal and stuffing data. The encoder may be configured encode the video signal in accordance with an encoding methodology and provide a bitstream based on the encoded video signal and the stuffing data. The stuffing data may include random and/or encrypted data. A decoder may receive a bitstream and remove stuffing data from the bitstream. The decoder may include a padding removal apparatus that may include a slice detection block and a bitstream editor. The slice detection block may be configured to determine locations of stuffing data in a bitstream and provide the locations to the bitstream editor using control signals. The bitstream editor may be configured to remove the stuffing data based on the control signals.

Claims (54)

1 . An encoding system, comprising:

an encoder configured to receive a video signal and stuffing data and encode the video signal in accordance with an encoding methodology, the encoder further configured to provide a bitstream including the encoded video signal and the stuffing data;

wherein the stuffing data includes random data, encrypted data, or combinations thereof.

2 . The encoding system of claim 1 , wherein the encoder is further configured to insert the stuffing data into the bitstream responsive, at least in part, to encoding the video signal.

3 . The encoding system of claim 1 , wherein the stuffing data comprises side band data.

4 . The encoding system of claim 1 , wherein the encoder is a first encoder and the bitstream is a first bitstream, the encoding system further comprising:

a scaler configured to receive the video signal and provide an adjusted video signal based, at least in part, on the video signal;

a second encoder coupled to the scaler and configured to receive the adjusted video signal and generate a second bitstream; and

an encryption block coupled to the first and second encoders, wherein the encryption block is configured to receive the second bitstream, the encryption block further configured to encrypt the second bitstream and provide the encrypted second bitstream to the first encoder; and

wherein the stuffing data includes the encrypted second bitstream.

5 . The encoding system of claim 1 , wherein the encoding methodology is in accordance with an H.264 coding standard.

6 . A padding removal apparatus, comprising:

a slice detection block configured to receive a bitstream, decode the bitstream, and determine a location of stuffing data in the bitstream, the slice detection block further configured to provide a control signal indicative of the location; and

a bitstream editor coupled to the slice detection block and configured to receive the bitstream and the control signal, the bitstream editor further configured to remove one or more bits of the stuffing data of the bitstream based, at least in part, on the control signal.

7 . The padding removal apparatus of claim 6 , wherein the slice detection block is configured to parse the padded bitstream in accordance with the H.264 coding standard.

8 . The padding removal apparatus of claim 6 , wherein the slice detection block comprises a decryption block and is configured to determine the location of the stuffing data responsive, at least in part, to decrypting an encrypted pointer.

9 . The padding removal apparatus of claim 6 , wherein the stuffing data includes encrypted data.

10 . A padding removal apparatus, comprising:

a first transcoder configured to receive a first bitstream in accordance with a first coding standard and locate and remove stuffing data from the first bitstream responsive, at least in part, to receipt of the first bitstream, the first transcoder further configured to provide a second bitstream in accordance with a second coding standard based, at least in part, on the first bitstream; and

a second transcoder coupled to the first transcoder and configured to receive the second bitstream and provide a third bitstream in accordance with the first coding standard based on the second bitstream.

11 . The padding removal apparatus of claim 10 , wherein the first coding standard comprises CABAC encoding.

12 . The padding removal apparatus of claim 10 , wherein the first transcoder is further configured to locate the stuffing data responsive, at least in part, to parsing the first bitstream.

13 . A method, comprising:

receiving a video signal and stuffing data at an encoder;

encoding the video signal in accordance with the H.264 coding standard to provide a first bitstream; and

providing a second bitstream including the first bitstream and the stuffing data;

wherein the stuffing data comprises at least one of random data, encrypted data, or combinations thereof.

14 . The method of claim 13 , wherein the stuffing data does not include start codes as identified by the coding standard.

15 . The method of claim 13 , wherein an amount of the stuffing data is based, at least in part, on a ratio control signal.

16 . The method of claim 13 , wherein said providing a second bitstream, comprises:

inserting the stuffing data into the first bitstream.

17 . The method of claim 13 , wherein the second bitstream is CAVLC encoded.

18 . A method, comprising:

receiving a padded bitstream;

determining the location of each of a plurality of slices in the padded bitstream;

generating a plurality of control signals corresponding to the location of each of the plurality of slices, respectively; and

removing one or more bits of the padded bitstream based, at least in part, on the each of the plurality of control signals.

19 . The method of claim 18 , wherein said determining comprises:

parsing the padded bitstream.

20 . The method of claim 18 , further comprising:

decrypting a pointer.

21 . The method of claim 18 , wherein the padded bitstream comprises CABAC encoded data.

22 . The method of claim 18 , wherein said removing comprises:

providing a bitstream responsive, at least in part, to receipt of a start code; and

not providing a bitstream responsive, at least in part, to receipt of one of the plurality of control signals.

23 . A method, comprising:

receiving a first bitstream comprising stuffing data;

decoding the first bitstream with a decoder to generate a video signal; and

encoding the video signal with an encoder to generate a second bitstream;

wherein the stuffing data comprises at least one of random data or encrypted data.

24 . The method of claim 23 , further comprising:

providing encoding decisions from the decoder to the encoder.

25 . The method of claim 23 , wherein the first bitstream comprises at least one of random stuffing data or encrypted stuffing data, wherein the second bitstream does not comprise stuffing data.

26 . The method of claim 23 , wherein the first bitstream has a first bit rate and the second bitstream has a second bit rate, wherein the first bit rate is greater than the second bit rate.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION; MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 048746/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 4, 2017
From: MAGNUM SEMICONDUCTOR, INC.
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 043207/0637 →
RELEASE OF SECURITY INTEREST Recorded Apr 5, 2017
From: SILICON VALLEY BANK
To: MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 042166/0405 →
SECURITY AGREEMENT Recorded Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION; CHIPX, INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
RELEASE OF SECURITY INTEREST Recorded Apr 29, 2016
From: CAPITAL IP INVESTMENT PARTNERS LLC
To: MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 038418/0611 →
SECURITY AGREEMENT Recorded Apr 6, 2016
From: MAGNUM SEMICONDUCTOR, INC.
To: SILICON VALLEY BANK
Reel/Frame 038366/0098 →
SHORT-FORM PATENT SECURITY AGREEMENT Recorded Oct 31, 2014
From: MAGNUM SEMICONDUCTOR, INC.
To: CAPITAL IP INVESTMENT PARTNERS LLC, AS ADMINISTRATIVE AGENT
Reel/Frame 034114/0102 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 24, 2012
From: PEARSON, ERIC C.
To: MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 028098/0621 →