Pseudomorphic high electron mobility transistor (pHEMT) comprising low temperature buffer layer
View Patent ↗A pseudomorphic high electron mobility transistor (pHEMT) comprises: a substrate comprising a Group III-V semiconductor material; buffer layer disposed over the substrate; and a channel layer disposed over the buffer layer. The buffer layer comprises microprecipitates of a Group V semiconductor element. A method of fabricating a pHEMT is also described.
1. A pseudomorphic high electron mobility transistor (pHEMT), comprising:
a substrate comprising a Group III-V semiconductor material; and
a buffer layer disposed over the substrate, wherein the buffer layer comprises microprecipitates of a Group V semiconductor element; and
a pseudomorphic channel layer disposed over the buffer layer.
2. A pHEMT as claimed in claim 1 , wherein the buffer layer electrically shields carriers in the pseudomorphic channel layer from deep level traps in the substrate.
3. A pHEMT device as claimed in claim 1 , wherein the buffer layer further comprises comparatively fast traps arising from excess Group V atoms in the buffer layer.
4. A pHEMT as claimed in claim 3 , wherein the comparatively fast traps have a lifetime in the range of approximately 1 femtosecond (fs) to approximately 1 picosecond (ps).
5. A pHEMT as claimed in claim 1 , wherein the Group III-V semiconductor material comprises gallium (Ga) and arsenic (As).
6. A pHEMT as claimed in claim 1 , wherein the butter layer further comprises comparatively fast traps arising from excess Group V atoms in the buffer layer and the Group V semiconductor element comprises As.
7. A power amplifier comprising the pHEMT as recited in claim 1 .
8. A pHEMT as claimed in claim 1 , further comprising a charge supply layer disposed over the buffer layer and beneath the pseudomorphic channel layer.
9. A pHEMT as claimed in claim 8 , wherein the charge supply layer is a first charge supply layer, and the pHEMT comprises a second charge supply layer disposed over the pseudomorphic channel layer.
10. A pseudomorphic high electron mobility transistor (pHEMT), comprising:
a substrate comprising a Group semiconductor material; and
a buffer layer disposed over the substrate, the buffer layer comprising: microprecipitates of a Group V semiconductor element; interstitial defects comprising the Group V semiconductor element and substitutional defects comprising the Group V semiconductor element, wherein the interstitial defects and the substitutional detects combined have a concentration in the range of approximately 1×10 18 cm −3 to approximately 1×10 20 cm −3 ; and
a channel layer disposed over the buffer layer.
11. A pHEMT as claimed in claim 10 , wherein the buffer layer electrically shields carriers in the channel from deep level traps in the substrate.
12. A pHEMT device as claimed in claim 10 , wherein the buffer layer further comprises comparatively fast traps arising from excess Group V atoms in the buffer layer.
13. A pHEMT as claimed in claim 12 , wherein the comparatively fast traps have a lifetime in the range of approximately 1 femtosecond (fs) to approximately 1 picosecond (ps).
14. A pHEMT as claimed in claim 10 , wherein the channel layer is a pseudomorphic channel layer.
15. A pHEMT as claimed in claim 8 , wherein the charge supply layer is a first charge supply layer, and the pHEMT comprises a second charge supply layer disposed over the pseudomorphic channel layer.
16. A pHEMT as claimed in claim 15 , wherein the buffer layer electrically shields carriers in the channel from deep level traps in the substrate.
17. A pHEMT device as claimed in claim 15 , wherein the butler layer further comprises comparatively fast traps arising from excess Group V atoms in the buffer layer.
18. A pHEMT as claimed in claim 17 , wherein the comparatively fast traps have a lifetime in the range of approximately 1 femtosecond (fs) to approximately 1 picosecond (ps).
19. A pseudomorphic high electron mobility transistor (pHEMT), comprising:
a substrate comprising a Group III-V semiconductor material; and
a buffer layer disposed over the substrate, wherein the buffer layer comprises microprecipitates of a Group V semiconductor element;
a channel layer disposed over the buffer layer; and
a plurality of layers disposed over the substrate and between the buffer layer and the channel layer, wherein a total thickness of the plurality of layers is in the range of approximately 500 Å to approximately 3500 Å.
20. A pHEMT as claimed in claim 19 , wherein the buffer layer electrically shields carriers in the channel from deep level traps in the substrate.
21. A pHEMT device as claimed in claim 19 , wherein the buffer layer further comprises comparatively fast traps arising from excess Group V atoms in the buffer layer.
22. A pHEMT as claimed in claim 21 , wherein the comparatively fast traps have a lifetime in the range of approximately 1 femtosecond (fs) to approximately 1 picosecond (ps).
23. A pHEMT as claimed in claim 19 , wherein the channel layer is a pseudomorphic channel layer.