IP Library Granted Patent US 8,935,582
Granted Patent B2
US 8,935,582 · App. 13/460,407 · Granted Jan 13, 2015

Generating test sets for diagnosing scan chain failures

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Quick Facts
Patent No.
US 8,935,582
App. No.
13/460,407
Granted
Jan 13, 2015
Kind
B2
Abstract

Embodiments of the disclosed technology comprise software-based techniques that can be used to improve scan chain test pattern generation and scan chain failure diagnosis resolution. For example, certain embodiments can be used to generate high quality chain diagnosis test patterns that are able to isolate a scan chain defect to a single scan cell. Such embodiments can be used to generate a “complete” test set—that is, a set of chain diagnosis test patterns that is able to isolate any scan chain defect in a faulty scan chain to a single scan cell.

Claims (20)

1. One or more computer-readable storage media storing computer-executable instructions for causing a computer to perform a method, the method comprising:

performing a first test pattern generation technique targeting a fault caused by a possible defect at a scan cell N of a scan chain, the first test pattern generation technique being designed to generate a single test pattern for detecting the fault at the scan cell N; and

performing a second test pattern generation technique targeting the fault if the first test pattern generation technique fails to generate the single test pattern, the second test pattern generation technique being designed to generate a plurality of test patterns that can be collectively used to differentiate the fault at the scan cell N from a fault at scan cell N−1 and its downstream scan cells.

2. The computer-readable storage media of claim 1 , wherein the method further comprises determining whether the first test pattern generation technique fails to generate a single test pattern by determining whether at least one of a time limit, memory usage limit, or other user specified limit has been met.

3. The computer-readable storage media of claim 1 , wherein the first test pattern generation technique is designed to generate a single test pattern capable of differentiating a defect at the scan cell from a defect at an adjacent scan cell downstream of the scan cell.

4. The computer-readable storage media of claim 1 , wherein the second test pattern generation technique is designed to generate a plurality of test patterns that together are capable of differentiating a defect at the scan cell from a defect at an adjacent scan cell downstream of the scan cell.

5. The computer-readable storage media of claim 1 , wherein the performing the first test pattern generation technique and performing the second test pattern generation technique if the first test pattern technique fails are repeated for multiple scan cells in the scan chain.

6. The computer-readable storage media of claim 1 , wherein the fault is a stuck-at fault or a timing fault.

7. One or more computer-readable storage media storing test patterns generated by a computer executing the instructions stored on the one or more computer-readable media of claim 1 .

8. A method for performing test pattern generation using a computer, comprising:

performing a first test pattern generation technique targeting a fault caused by a possible defect at a scan cell N of a scan chain, the first test pattern generation technique being designed to generate a single test pattern for detecting the fault at the scan cell N; and

performing a second test pattern generation technique targeting the fault if the first test pattern generation technique fails to generate the single test pattern, the second test pattern generation technique being designed to generate a plurality of test patterns that can be collectively used to differentiate the fault at the scan cell N from a fault at scan cell N−1 and its downstream scan cells.

9. The method of claim 8 , wherein the method further comprises determining whether the first test pattern generation technique fails to generate a single test pattern by determining whether at least one of a time limit, memory usage limit, or other user specified limit has been met.

10. The method of claim 8 , wherein the first test pattern generation technique is designed to generate a single test pattern capable of differentiating a defect at the scan cell from a defect at an adjacent scan cell downstream of the scan cell.

11. The method of claim 8 , wherein the second test pattern generation technique is designed to generate a plurality of test patterns that together are capable of differentiating a defect at the scan cell from a defect at an adjacent scan cell downstream of the scan cell.

12. The method of claim 8 , wherein the performing the first test pattern generation technique and performing the second test pattern generation technique if the first test pattern technique fails are repeated for multiple scan cells in the scan chain.

13. The method of claim 8 , wherein the fault is a stuck-at fault or a timing fault.

14. A system, comprising:

means for performing a first test pattern generation technique targeting a fault caused by a possible defect at a scan cell N of a scan chain, the first test pattern generation technique being designed to generate a single test pattern for detecting the fault at the scan cell N; and

means for performing a second test pattern generation technique targeting the fault if the first test pattern generation technique fails to generate the single test pattern, the second test pattern generation technique being designed to generate a plurality of test patterns that can be collectively used to differentiate the fault at the scan cell N from a fault at scan cell N−1 and its downstream scan cells.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Jun 29, 2021
From: MENTOR GRAPHICS CORPORATION; SIEMENS INDUSTRY SOFTWARE INC.
To: SIEMENS INDUSTRY SOFTWARE INC.
Reel/Frame 056702/0387 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2012
From: GUO, RUIFENG; HUANG, YU; CHENG, WU-TUNG
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 028159/0347 →