Methods of forming programmed memory cells

1. A method of programming a memory cell, the memory cell comprising a transistor which includes a transistor gate spaced from a channel region by at least a gate dielectric, which includes a first source/drain region adjacent one side of the channel region, and which includes a second source/drain region adjacent an opposing side of the channel region from the first source/drain region;

wherein the channel region comprises phase change material regions adjacent the first and second source/drain regions and comprises non-phase change material between the phase change material regions, the method comprising:

utilizing the first source/drain region as a source and the second source/drain region as a drain to induce one memory state of the memory cell;

utilizing the second source/drain region as a source and the first source/drain region as a drain to induce another memory state of the memory cell; and

wherein the memory cell is supported by a monocrystalline silicon base.

2. A method of programming a memory cell, the memory cell comprising a transistor which includes a transistor gate spaced from a channel region by at least a gate dielectric, which includes a source region adjacent one side of the channel region, and which includes a drain region adjacent an opposing side of the channel region from the source region; wherein the channel region comprises phase change material adjacent at least the drain region, the method comprising:

forming an inversion layer within the channel region adjacent the gate dielectric, the inversion layer having a pinch-off region within the phase change material adjacent the drain region;

utilizing hot carriers within the pinch-off region to change a phase of the phase change material;

wherein the channel region comprises non-phase change material; and

wherein the memory cell is supported by a monocrystalline silicon base.

3. The method of claim 2 wherein the change in phase decreases crystallinity of the phase change material.

4. The method of claim 2 wherein the change in phase increases crystallinity of the phase change material.

5. The method of claim 2 wherein the hot carriers are electrons.

6. The method of claim 2 wherein the hot carriers are holes.

7. The method of claim 2 wherein the channel region primarily comprises non-phase change semiconductor material, and comprises the phase change material only adjacent the drain region.

8. The method of claim 7 wherein the non-phase change semiconductor material of the channel region comprises monocrystalline silicon.

9. A method of forming a programmed memory cell, comprising:

forming a transistor which includes a channel region between first and second source/drain regions; the channel region being supported by a silicon-containing substrate; the channel region comprising a first volume of programmable material adjacent the first source/drain region, comprising a second volume of programmable material adjacent the second source/drain region, and comprising non-phase change material between the first and second volumes;

forming a first inversion layer within the channel region, the first inversion layer having a first pinch-off region within the first volume of programmable material;

utilizing hot carriers within the first pinch-off region to change a phase within the first volume of programmable material and thereby achieve a first memory state;

forming a second inversion layer within the channel region, the second inversion layer having a second pinch-off region within the second volume of programmable material; and

utilizing hot carriers within the second pinch-off region to change a phase within the second volume of programmable material and thereby achieve a second memory state.