IP Library Granted Patent US 8,643,083
Granted Patent B2
US 8,643,083 · App. 13/465,600 · Granted Feb 4, 2014

Electronic devices with ultraviolet blocking layers

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Quick Facts
Patent No.
US 8,643,083
App. No.
13/465,600
Granted
Feb 4, 2014
Kind
B2
Abstract

Devices and systems for insulating integrated circuits from ultraviolet (“UV”) light are described. The device includes a conductive feature, a first and second UV blocking layer, a first and second insulating laver, and a conductive structure. The first insulating layer overlays the first UV blocking layer. A via opening extends through the first insulating layer and the first UV blocking layer. The second UV blocking layer overlays the first insulating laver. The second insulating layer overlays the second UV blocking layer. An interconnect trench is defined in the second insulating layer and second UV blocking layer. The conductive structure is electrically connected to the conductive feature and extends into the via opening and along the interconnect trench.

Claims (41)

1. An electronic device comprising:

a conductive feature;

a first ultraviolet (UV) blocking layer overlying the conductive feature, the first UV blocking layer being within 90 nm of the conductive feature;

a first insulating layer overlying the first UV blocking layer, wherein the first insulating layer is at least 4 times thicker than the first UV blocking layer, a via opening extending through the first insulating layer and the first UV blocking layer;

a second UV blocking layer overlying the first insulating layer; and

a second insulating layer overlying the second UV blocking layer, an interconnect trench defined in the second UV blocking layer and the second insulating layer; and

a conductive structure extending into the via opening within the first insulating layer and the first UV blocking layer and along the interconnect trench defined in the second UV blocking layer and the second insulating layer, wherein the conductive structure is electrically connected to the conductive feature.

2. The electronic device of claim 1 , wherein the conductive structure includes a dual-inlaid structure that extends into the via opening and interconnect trench.

3. The electronic device of claim 1 , further comprising an antireflective layer overlying the first insulating layer.

4. The electronic device of claim 1 , wherein the first UV blocking layer includes a silicon-rich material.

5. The electronic device of claim 1 , wherein each of the first UV blocking layer and the second UV blocking layer is a silicon-rich oxide, a silicon-rich nitride, a silicon-rich oxynitride, or any combination thereof.

6. The electronic device of claim 1 , the first UV blocking layer and the second UV blocking layer have substantially a first same composition; and the first insulating layer and the second insulating layer have substantially a second same composition.

7. A system comprising:

an electronic device comprising:

a conductive feature;

a first ultraviolet (UV) blocking layer overlying the conductive feature, the first UV blocking layer being within 90 nm of the conductive feature;

a first insulating layer overlying the first UV blocking layer, wherein the first insulating layer is at least 4 times thicker than the first UV blocking layer, a via opening extending through the first insulating layer and the first UP blocking layer;

a second UV blocking layer overlying the first insulating layer; and

a second insulating layer overlying the second UP blocking layer, an interconnect trench defined in the second UV blocking layer and the second insulating layer; and

a conductive structure extending into the via opening within the first insulating layer and the first UV blocking layer and along the interconnect trench defined in the second UV blocking layer and the second insulating layer, wherein the conductive structure is electrically connected to the conductive feature;

a processor electrically coupled to the electronic device; and

a display electrically coupled to the processor.

8. The system of claim 7 , wherein the conductive structure includes a dual-inlaid structure that extends into the via opening and interconnect trench.

9. The system of claim 7 , wherein the electronic device further comprises an antireflective layer overlying the first insulating layer.

10. The system of claim 7 , wherein the first UV blocking layer includes a silicon-rich material.

11. The system of claim 7 , wherein each of the first UV blocking layer and the second UP blocking layer is a silicon-rich oxide, a silicon-rich nitride, a silicon-rich oxynitride, or any combination thereof.

12. The system of claim 7 , wherein the first UV blocking layer and the second UP blocking layer have substantially a first same composition; and the first insulating layer and the second insulating layer have substantially a second same composition.

13. An electronic device comprising:

a conductive feature;

a first ultraviolet (UV) blocking layer overlying the conductive feature, the first UV blocking layer being within 90 nm of the conductive feature;

a first insulating layer overlying the first UV blocking layer, a first opening extending through the first insulating layer and the first UV blocking layer;

a second UV blocking layer overlying the first insulating layer; and

a second insulating layer overlying the second UV blocking layer, a second opening defined in the second UV blocking layer and the second insulating layer; and

a conductive structure electrically connected to the conductive feature and extending into the first and second openings.

14. The electronic device of claim 13 , wherein the conductive structure includes a dual-inlaid structure that extends into the via opening and interconnect trench.

15. The electronic device of claim 13 , further comprising an antireflective layer overlying the first insulating layer.

16. The electronic device of claim 13 , wherein the first UV blocking layer includes a silicon-rich material.

17. The electronic device of claim 13 , wherein each of the first UV blocking layer and the second UV blocking layer is a silicon-rich oxide, a silicon-rich nitride, a silicon-rich oxynitride, or any combination thereof.

18. The electronic device of claim 13 , wherein the first insulating layer is at least 4 times thicker than the first UV blocking layer.

19. The electronic device of claim 13 , wherein the first opening is a via opening.

20. The electronic device of claim 13 , wherein the second opening is an interconnect trench.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 2, 2017
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 044094/0669 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 28, 2017
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 044051/0244 →
RELEASE OF SECURITY INTEREST Recorded Sep 28, 2017
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 044052/0280 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 26, 2017
From: SPANSION LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 044016/0532 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →