Patent Assignment
Reel/Frame 044094/0669
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded: 2017-10-02
Received: 2017-10-02
Pages: 12
Assignor
CYPRESS SEMICONDUCTOR CORPORATION
Executed: 2017-09-28
Assignee
MONTEREY RESEARCH, LLC
3945 FREEDOM CIRCLE, SUITE 900, SANTA CLARA, CA, 95054, UNITED STATES
Covered Applications
(51)
METAL-INSUALTOR-METAL (MIM) DEVICE AND METHOD OF FORMATION THEREROF
App. No. 14/460,205
→
METAL-INSULATOR-METAL (MIM) DEVICE AND METHOD OF FORMATION THEREOF
App. No. 13/866,898
→
SUPPRESSED CARRIER HARMONIC AMPLITUDE MODULATOR
App. No. 13/802,665
→
ETCH STOP LAYER FOR MEMORY CELL RELIABILITY IMPROVEMENT
App. No. 13/617,291
→
Suppressed Carrier Harmonic Amplitude Modulator
App. No. 61/662,763
→
DAMASCENE METAL-INSULATOR-METAL (MIM) DEVICE WITH IMPROVED SCALEABILITY
App. No. 13/529,284
→
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
App. No. 13/526,321
→
ELECTRONIC DEVICES WITH ULTRAVIOLET BLOCKING LAYERS
App. No. 13/465,600
→
GATE TRIM PROCESS USING EITHER WET ETCH OR DRY ETCH APPROACH TO TARGET CD FOR SELECTED TRANSISTORS
App. No. 13/278,343
→
DIODE AND RESISTIVE MEMORY DEVICE STRUCTURES
App. No. 13/271,129
→
SIH4 SOAK FOR LOW HYDROGEN SIN DEPOSITION TO IMPROVE FLASH MEMORY DEVICE PERFORMANCE
App. No. 13/165,522
→
SACRIFICIAL NITRIDE AND GATE REPLACEMENT
App. No. 13/153,558
→
DUAL CHARGE STORAGE NODE MEMORY DEVICE AND METHODS FOR FABRICATING SUCH DEVICE
App. No. 13/075,047
→
REDUCTION OF DEFECTS FORMED ON THE SURFACE OF A SILICON OXYNITRIDE FILM
App. No. 13/032,191
→
PROCESSES FOR FORMING ELECTRONIC DEVICES INCLUDING POLISHING METAL-CONTAINING LAYERS
App. No. 13/025,979
→
STRESS REDUCTION ON VIAS AND YIELD IMPROVEMENT IN LAYOUT DESIGN THROUGH AUTO GENERATION OF VIA FILL
App. No. 12/964,594
→
ELECTRONIC DEVICE INCLUDING A GATE ELECTRODE HAVING PORTIONS WITH DIFFERENT CONDUCTIVITY TYPES
App. No. 12/844,392
→
GATE TRIM PROCESS USING EITHER WET ETCH OR DRY ETCH APPRAOCH TO TARGET CD FOR SELECTED TRANSISTORS
App. No. 12/424,023
→
METHOD AND ARCHITECTURE FOR FAST FLASH MEMORY PROGRAMMING
App. No. 12/405,947
→
SIH4 SOAK FOR LOW HYDROGEN SIN DEPOSITION TO IMPROVE FLASH MEMORY DEVICE PERFORMANCE
App. No. 12/290,916
→
PROBE APPARATUS, A PROCESS OF FORMING A PROBE HEAD, AND A PROCESS OF FORMING AN ELECTRONIC DEVICE
App. No. 12/174,743
→
METHOD OF FORMING AN ELECTRONIC DEVICE INCLUDING FORMING A CHARGE STORAGE ELEMENT IN A TRENCH OF A WORKPIECE
App. No. 12/102,488
→
DIODE AND RESISTIVE MEMORY DEVICE STRUCTURES
App. No. 12/072,588
→
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
App. No. 12/012,849
→
ELECTRONIC DEVICE INCLUDING A GATE ELECTRODE HAVING PORTIONS WITH DIFFERENT CONDUCTIVITY TYPES AND A PROCESS OF FORMING THE SAME
App. No. 12/020,316
→
READ AND VOLATILE NV STANDBY DISTURB
App. No. 12/006,225
→
METHOD OF FORMING AN ELECTRONIC DEVICE
App. No. 11/962,714
→
REDUCTION OF DEFECTS FORMED ON THE SURFACE OF A SILICON OXYNITRIDE FILM
App. No. 12/004,676
→
WORK FUNCTION ENGINEERING FOR FN ERASE OF A MEMORY DEVICE WITH MULTIPLE CHARGE STORAGE ELEMENTS IN AN UNDERCUT REGION
App. No. 11/953,690
→
COMBINED VOLATILE NONVOLATILE ARRAY
App. No. 11/999,684
→
PROCESSES FOR FORMING ELECTRONIC DEVICES INCLUDING POLISHING METAL-CONTAINING LAYERS
App. No. 11/934,628
→
METAL-INSULATOR-METAL (MIM) DEVICE AND METHOD OF FORMATION THEREOF
App. No. 11/980,213
→
GATE REPLACEMENT WITH TOP OXIDE REGROWTH FOR THE TOP OXIDE IMPROVEMENT
App. No. 11/848,515
→
SACRIFICIAL NITRIDE AND GATE REPLACEMENT
App. No. 11/847,507
→
METHODS OF FORMING SILICIDES OF DIFFERENT THICKNESSES ON DIFFERENT STRUCTURES
App. No. 11/748,743
→
CYCLING IMPROVEMENT USING HIGHER ERASE BIAS
App. No. 11/724,711
→
Cycling improvement using higher erase bias
App. No. 60/877,192
→
METHOD AND APPARATUS TO CREATE AN ERASE DISTURB ON A NON-VOLATILE STATIC RANDOM ACCESS MEMORY CELL
App. No. 11/644,447
→
METHOD AND APPARATUS TO PROGRAM AND ERASE A NON-VOLATILE STATIC RANDOM ACCESS MEMORY FROM THE BIT LINES
App. No. 11/644,641
→
DAMASCENE METAL-INSULATOR-METAL (MIM) DEVICE WITH IMPROVED SCALEABILITY
App. No. 11/521,204
→
METHOD AND ARCHITECTURE FOR FAST FLASH MEMORY PROGRAMMING
App. No. 11/504,254
→
OPTICAL NAVIGATION SENSOR WITH TRACKING AND LIFT DETECTION FOR OPTICALLY TRANSPARENT CONTACT SURFACES
App. No. 11/455,921
→
DUAL CHARGE STORAGE NODE MEMORY DEVICE AND METHODS FOR FABRICATING SUCH DEVICE
App. No. 11/408,866
→
DISPOSABLE HARD MASK FOR FORMING BIT LINES
App. No. 11/100,563
→
ETCH STOP LAYER FOR MEMORY CELL RELIABILITY IMPROVEMENT
App. No. 11/008,240
→
FLASH MEMORY DEVICE HAVING INCREASED OVER-ERASE CORRECTION EFFICIENCY AND ROBUSTNESS AGAINST DEVICE VARIATIONS
App. No. 10/976,760
→
SHALLOW TRENCH ISOLATION FILL PROCESS
App. No. 10/174,550
→
ESD IMPLANT FOLLOWING SPACER DEPOSITION
App. No. 09/891,885
→
METHOD FOR FORMING SELF-ALIGNED CONTACTS USING CONSUMABLE SPACERS
App. No. 09/850,484
→
MULTI-STEP HIGH DENSITY PLASMA (HDP) PROCESS TO OBTAIN UNIFORMLY DOPED INSULATING FILM
App. No. 09/823,839
→
Discharge control circuit of batteries
App. No. 09/769,344
→