Granted Patent B2

US 7,915,169 · App. 11/934,628 · Granted Mar 29, 2011

Abstract

Claims (34)

1. A process of forming an electronic device comprising:

providing a workpiece comprising a substrate, an interlevel dielectric overlying the substrate, a refractory-metal-containing layer over the interlevel dielectric, and a first metal-containing layer over the refractory-metal-containing layer, wherein the first metal-containing layer includes a metal element other than a refractory metal element; and

polishing the first metal-containing layer and the refractory-metal-containing layer as a continuous action to expose the interlevel dielectric, wherein:

polishing the first metal-containing layer and the refractory-metal-containing layer is performed using a selectivity agent, wherein the selectivity agent improves a selectivity of a removal rate of the first metal-containing layer or the refractory-metal-containing layer to a removal rate of the interlevel dielectric; and

the selectivity agent comprises a heteroaromatic polymer.

2. The process of claim 1 , further comprising polishing the interlevel dielectric to remove no more than approximately 90 nm of the interlevel dielectric.

3. The process of claim 2 , wherein the interlevel dielectric includes an oxide layer at a surface in contact with the refractory-metal-containing layer.

4. The process of claim 3 , wherein the refractory-metal-containing layer comprises a refractory metal nitride, a refractory metal silicon nitride, or any combination thereof.

5. The process of claim 1 , wherein the first metal-containing layer comprises a copper, nickel, a noble metal, or any combination thereof.

6. The process of claim 1 , wherein the refractory-metal-containing layer comprises tantalum nitride, tantalum silicon nitride, titanium nitride, titanium silicon nitride, or any combination thereof.

7. The process of claim 1 , wherein polishing the first metal-containing layer and the refractory-metal-containing layer is performed such that the workpiece remains in contact with a same polishing pad and using a same polishing fluid throughout polishing the first metal-containing layer and the refractory-metal-containing layer.

8. The process of claim 7 , further comprising polishing the interlevel dielectric such that the workpiece remains in contact with the same polishing pad and using the same polishing fluid.

9. The process of claim 8 , wherein polishing the interlevel dielectric removes approximately 2 nm to approximately 4 nm of the interlevel dielectric.

10. The process of claim 1 , wherein polishing the first metal-containing layer is performed using a polishing fluid that includes the selectivity agent, wherein the selectivity agent is in a range of approximately 0.25 to approximately 0.95 weight percent of the polishing fluid.

11. The process of claim 1 , wherein the refractory-metal-containing layer comprises a refractory metal nitride, a refractory metal silicon nitride, or any combination thereof, and the selectivity agent improves the selectivity of the removal rate of the refractory-metal-containing layer to the removal rate of the interlevel dielectric.

12. The process of claim 1 , further comprising monitoring the polishing to detect an endpoint corresponding to when the refractory-metal-containing layer is removed.

13. The process of claim 12 , wherein monitoring comprises detecting a significant reduction in friction that occurs after an initial delay period has expired.

14. A process of forming an electronic device comprising:

providing a workpiece comprising a substrate, an interlevel dielectric overlying the substrate, a refractory-metal-containing layer over the interlevel dielectric, and a first metal-containing layer over the refractory-metal-containing layer, wherein the first metal-containing layer includes a metal element other than a refractory metal element; and

polishing the first metal-containing layer and the refractory-metal-containing layer as a continuous action to expose the interlevel dielectric, wherein:

polishing the first metal-containing layer is performed using a selectivity agent, wherein the selectivity agent improves a selectivity of a removal rate of the first metal-containing layer to a removal rate of the interlevel dielectric; and

the selectivity agent comprises a polypyrrole, a polythiophene, a polyfuran, or poly(4-ethylpyridine-1-oxide).

15. A process of forming an electronic device comprising:

forming an oxide layer over a substrate, wherein the substrate includes a conductive region;

patterning the oxide layer to define an opening exposing the conductive region;

forming a barrier layer over the oxide layer and within the opening, wherein the barrier layer includes a refractory metal element;

forming a seed layer over the barrier layer, wherein the seed layer includes copper;

plating a copper-containing layer over the seed layer;

polishing the copper-containing layer, the seed layer, and the barrier layer to expose the oxide layer, wherein:

polishing the copper-containing layer, the seed layer, and the barrier layer and polishing the oxide layer is performed using a same polishing pad or and a same polishing fluid;

polishing is performed using a selectivity agent, wherein the selectivity agent improves a selectivity of a removal rate of the barrier layer to a removal rate of the oxide layer; and

polishing the copper-containing layer, the seed layer, and the barrier layer and polishing the oxide layer is performed using a polishing fluid that includes a heteroaromatic polymer; and

polishing the oxide layer to remove no more than 20 nm of the oxide layer.

16. The process of claim 15 , further comprising monitoring the polishing the copper-containing layer, the seed layer, and the barrier layer to detect an endpoint corresponding to the barrier layer is removed, wherein detecting comprising determining that a significant reduction in friction occurs after an initial delay period has expired.

Assignments (9)