Semiconductor packages and methods of packaging semiconductor devices
View Patent ↗Semiconductor packages and methods of forming a semiconductor package are disclosed. The method includes providing at least one die having first and second surfaces. The second surface of the die includes a plurality of conductive pads. A permanent carrier is provided and the at least one die is attached to the permanent carrier. The first surface of the at least one die is facing the permanent carrier. A cap having first and second surfaces is formed to encapsulate the at least one die. The first surface of the cap contacts the permanent carrier and the second surface of the cap is disposed at a different plane than the second surface of the die.
1. A method for forming a semiconductor package comprising:
providing at least one die having active and inactive surfaces, wherein the active surface of the die includes a plurality of conductive die pads;
providing a planar permanent carrier having first and second planar surfaces;
attaching the at least one die to the second planar surface of the planar permanent carrier, wherein the inactive surface of the at least one die is facing the planar permanent carrier which supports the die during assembly; and
forming a cap having first and second surfaces to encapsulate the at least one die, wherein
the cap surrounds the at least one die without contacting the active surface of the at least one die,
the second planar surface of the planar permanent carrier covers the inactive surface of the at least one die and the first surface of the cap, and
the second surface of the cap is disposed at a different plane than the active surface of the die.
2. The method of claim 1 comprising providing an adhesive on the second planar surface of the planar permanent carrier.
3. The method of claim 2 wherein the adhesive is provided at least on a die region on the second planar surface of the planar permanent carrier for permanently holding the at least one die to the permanent carrier.
4. The method of claim 1 wherein the planar permanent carrier comprises a wafer.
5. The method of claim 2 wherein the adhesive comprises a film, paste, liquid or thermally conductive adhesive.
6. The method of claim 2 wherein the first surface of the cap is coplanar with a top surface of the adhesive.
7. The method of claim 1 wherein attaching the at least one die to the planar permanent carrier is performed prior to forming the cap.
8. The method of claim 1 comprising forming a sacrificial layer on the entire active surface of the at least one die.
9. The method of claim 8 comprising removing the sacrificial layer from the active surface of the at least on die after forming the cap.
10. The method of claim 1 wherein the cap is formed by a molding technique comprising transfer molding or compression molding.
11. The method of claim 1 comprising:
forming a built-up package substrate which comprises at least a first patterned substrate layer having first and second surfaces, wherein the first surface of the patterned substrate layer comprises a die region and a non-die region, the die and non-die regions are defined by the first surface of the same first patterned substrate layer, wherein the die region is disposed in a different plane than the non-die region, and wherein the first patterned substrate layer comprises
vias disposed therein,
interconnect structures having substrate via contacts disposed in the vias and conductive traces disposed over the second surface of the first patterned substrate layer, wherein at least one of the conductive traces which is coupled to the conductive pad extends from the die region to the non-die region, and
wherein the active surface of the at least one die directly contacts the first surface of the first patterned substrate layer at the die region and the plurality of conductive pads of the die are directly coupled to and contact the substrate via contacts.
12. A method for forming a semiconductor package comprising:
providing a wafer having a plurality of die stacks having active and inactive surfaces, wherein the active surface of the die stack includes a plurality of conductive die pads;
singulating the wafer into individual die stacks;
providing a planar permanent carrier having first and second planar surfaces;
attaching the die stacks to the second planar surface of the planar permanent carrier, wherein the inactive surface of the at least one die stack is facing the planar permanent carrier which supports the die stacks during assembly; and
forming a cap having first and second surfaces to encapsulate the die stacks, wherein
the cap surrounds the die stacks without contacting the active surface of the die stacks,
the second planar surface of the planar permanent carrier covers the inactive surface of the die stacks and the first surface of the cap, and
the second surface of the cap is disposed at a different plane than the active surface of the die stack.
13. The method of claim 12 comprising providing an adhesive on the second planar surface of the planar permanent carrier.
14. The method of claim 13 wherein the adhesive is provided at least on a die region on the second planar surface of the planar permanent carrier for permanently holding the die stacks to the carrier.
15. The method of claim 12 comprising providing an adhesive on the inactive surface of the die stacks.
16. The method of claim 12 wherein the adhesive comprises a film, paste, liquid or thermally conductive adhesive.
17. The method of claim 12 wherein the permanent carrier includes a wafer.
18. The method of claim 12 wherein attaching the die stacks to the planar permanent carrier is performed prior to forming the cap.
19. The method of claim 12 comprising forming a sacrificial layer on the entire active surface of the die stacks.
20. The method of claim 12 comprising:
forming a built-up package substrate which comprises at least a first patterned substrate layer having first and second surfaces, wherein the first surface of the patterned substrate layer comprises a die region and a non-die region, the die and non-die regions are defined by the first surface of the same first patterned substrate layer, wherein the die region is disposed in a different plane than the non-die region, and wherein the first patterned substrate layer comprises
vias disposed therein,
interconnect structures having substrate via contacts disposed in the vias and conductive traces disposed over the second surface of the first patterned substrate layer, and
wherein the active surface of the die stack directly contacts the first surface of the first patterned substrate layer at the die region and the plurality of conductive pads are directly coupled to and contact the substrate via contacts.