IP Library › Granted Patent US 8,803,149
Granted Patent B2
US 8,803,149 · App. 13/473,637 · Granted Aug 12, 2014

Thin-film transistor device including a hydrogen barrier layer selectively formed over an oxide semiconductor layer

Inventor: Junichiro Sakata (Atsugi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,803,149
App. No.
13/473,637
Granted
Aug 12, 2014
Kind
B2
Abstract

A hydrogen barrier layer is selectively provided over an oxide semiconductor layer including hydrogen and hydrogen is selectively desorbed from a given region in the oxide semiconductor layer by conducting oxidation treatment, so that regions with different conductivities are formed in the oxide semiconductor layer. After that, a channel formation region, a source region, and a drain region can be formed with the use of the regions with different conductivities formed in the oxide semiconductor layer.

Claims (42)

1. A semiconductor device comprising:

an oxide semiconductor layer including a first region and a second region, the first region including a channel region;

a hydrogen barrier layer selectively over the second region of the oxide semiconductor layer so as to expose at least a part of the first region of the oxide semiconductor layer;

a gate insulating layer adjacent to the oxide semiconductor layer;

a gate electrode adjacent to the oxide semiconductor layer with the gate insulating layer interposed therebetween; and

a conductive layer in contact with the second region of the oxide semiconductor layer,

wherein the hydrogen barrier layer overlaps with the gate insulating layer over the second region of the oxide semiconductor layer,

wherein the first region includes hydrogen at a lower concentration than the second region,

wherein the first region includes oxygen at a higher concentration than the second region, and

wherein the second region of the oxide semiconductor layer is interposed between the hydrogen barrier layer and the conductive layer, and wherein the hydrogen barrier layer comprises dielectric material.

2. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer comprises indium.

3. The semiconductor device according to claim 1 , wherein the gate electrode is located above the oxide semiconductor layer.

4. The semiconductor device according to claim 1 , wherein the gate electrode is located below the oxide semiconductor layer.

5. A semiconductor device comprising:

an oxide semiconductor layer including a first region and a second region, the first region including a channel region;

a hydrogen barrier layer selectively over the second region of the oxide semiconductor layer so as to expose at least a part of the first region of the oxide semiconductor layer;

a gate insulating layer adjacent to the oxide semiconductor layer;

a gate electrode adjacent to the oxide semiconductor layer with the gate insulating layer interposed therebetween;

a conductive layer in contact with the second region of the oxide semiconductor layer; and

a pixel electrode in electrical contact with the conductive layer,

wherein the hydrogen barrier layer overlaps with the gate insulating layer over the second region of the oxide semiconductor layer,

wherein the first region includes hydrogen at a lower concentration than the second region,

wherein the first region includes oxygen at a higher concentration than the second region, and

wherein the second region of the oxide semiconductor layer is interposed between the hydrogen barrier layer and the conductive layer, and wherein the hydrogen barrier layer comprises dielectric material.

6. The semiconductor device according to claim 5 , wherein the oxide semiconductor layer comprises indium.

7. The semiconductor device according to claim 5 , wherein the gate electrode is located above the oxide semiconductor layer.

8. The semiconductor device according to claim 5 , wherein the gate electrode is located below the oxide semiconductor layer.

9. The semiconductor device according to claim 1 , wherein the gate electrode overlaps with part of the second region.

10. The semiconductor device according to claim 5 , wherein the gate electrode overlaps with part of the second region.

11. The semiconductor device according to claim 1 , wherein the hydrogen barrier layer is in contact with the oxide semiconductor layer.

12. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer is provided between the conductive layer and the hydrogen barrier layer.

13. A semiconductor device comprising:

an oxide semiconductor layer including a first region and a second region, the first region including a channel region;

an insulating layer overlapping with the second region of the oxide semiconductor layer, wherein the insulating layer does not overlap with the first region of the oxide semiconductor layer;

a gate insulating layer adjacent to the oxide semiconductor layer;

a gate electrode adjacent to the oxide semiconductor layer with the gate insulating layer interposed therebetween; and

a conductive layer in contact with the second region of the oxide semiconductor layer,

wherein the insulating layer overlaps with the gate insulating layer,

wherein the first region includes hydrogen at a lower concentration than the second region,

wherein the first region includes oxygen at a higher concentration than the second region, and

wherein the second region of the oxide semiconductor layer is interposed between the insulating layer and the conductive layer, and wherein the insulating layer comprises dielectric material.

14. The semiconductor device according to claim 13 , wherein the oxide semiconductor layer comprises indium.

Priority Claims (1)
JP 2008-323725 · Dec 19, 2008 · national
Continuity (2)
Continuation 12634096 · Dec 9, 2009
Related Publication 20120223307A1 · Sep 6, 2012