IP Library › Granted Patent US 8,780,616
Granted Patent B2
US 8,780,616 · App. 13/477,970 · Granted Jul 15, 2014

Magnetic memory system and methods in various modes of operation

Inventors: Thomas Akira Ohki (Arlington, MA); Andrew Kent (New York, NY)
Assignees: Raytheon BBN Technologies Corp.; New York University
G11C11/02G11C11/16
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Quick Facts
Patent No.
US 8,780,616
App. No.
13/477,970
Granted
Jul 15, 2014
Kind
B2
Abstract

A magnetic memory system includes a superconductor circuit and one or more magnetic memory elements to store data. To write data, a driver circuit in the superconductor circuit generates a magnetic signal for transmission over a superconductor link extending between the superconductor circuit and the magnetic memory element. To read data, a sensing circuit in the superconductor circuit monitors a superconductor link extending from sensing circuit to the magnetic memory element. The magnetic memory element can be a spin-transfer type magnetic memory element.

Claims (75)

1. A system comprising:

a superconductor circuit to generate a magnetic signal;

a magnetic memory element to store data;

a link between the superconductor circuit and the magnetic memory element; and

the superconductor circuit transmitting the magnetic signal to the magnetic memory element over the link to access the magnetic memory element;

wherein the link between the superconductor circuit and the magnetic memory element is an electrically conductive link on which to convey the magnetic signal from the superconductor circuit to the magnetic memory element;

wherein the electrically conductive link is a microstrip line; and

where the microstrip line is fabricated in at least one layer of a hybrid electronic semiconductor chip in which the superconductor circuit and the magnetic memory element are fabricated.

2. The system as in claim 1 , wherein the magnetic memory element is a spin-torque magnetic memory element.

3. The system as in claim 1 , wherein the superconductor circuit is a single flux quantum comparator circuit, the single flux quantum comparator circuit monitoring a state of the magnetic memory element to retrieve the data.

4. The system as in claim 1 , wherein the magnetic signal is a quantum-based signal; and

wherein the superconductor circuit includes at least one Josephson junction to generate the quantum-based signal.

5. The system as in claim 4 , wherein an amount of energy of the quantum-based signal to write the data to the magnetic memory element is less than a threshold value of about 1×10 −19 Joules.

6. The system as in claim 4 , wherein an amount of energy of the quantum-based signal to read the data from the magnetic memory element is less than about 1×10 −20 joules.

7. The system as in claim 1 , wherein the magnetic memory element includes spin-polarizing material made of metal.

8. The system as in claim 1 , wherein the magnetic memory element includes at least one spin-polarizing material selected from the group consisting of:

i) cobalt

ii) nickel,

ii) iron.

9. The system as in claim 1 , wherein the electrically conductive link is a super-conductive link on which to convey the magnetic signal from the superconductor circuit to the magnetic memory element.

10. The system as in claim 9 , wherein the super-conductive link is a super-conductive microstrip link on which to convey the magnetic signal from the superconductor circuit to the magnetic memory element.

11. The system as in claim 1 , wherein the superconductor circuit includes:

a superconductor driver circuit to write the data to the magnetic memory element; and

a superconductor comparator circuit to read the data from the magnetic memory element.

12. The system as in claim 1 , wherein the magnetic memory element is a spin-transfer device incorporating a magnetic polarizer with respect to a magnetic switchable layer in the magnetic memory element.

13. The system as in claim 1 further comprising:

an environmental controller system to maintain a temperature of the superconductor circuit, the electrically conductive link, and the magnetic memory element below a threshold temperature to operate in a super-conductive mode.

14. The system as in claim 1 , wherein the superconductor circuit is a single flux quantum line driver; and

wherein the magnetic signal is a single flux quantum signal.

15. The system as in claim 1 , wherein an impedance of the magnetic memory element is substantially matched to an output impedance of the superconductor circuit.

16. A system comprising:

a superconductor circuit to generate a magnetic signal;

a magnetic memory element to store data;

a link between the superconductor circuit and the magnetic memory element;

the superconductor circuit transmitting the magnetic signal to the magnetic memory element over the link to access the magnetic memory element; and

wherein an impedance of the magnetic memory element is substantially matched to an output impedance of the superconductor circuit.

17. The system as in claim 16 , wherein the superconductor circuit is a single flux quantum comparator circuit, the single flux quantum comparator circuit monitoring a state of the magnetic memory element to retrieve the data.

18. The system as in claim 16 , wherein the link is a super-conductive link on which to convey the magnetic signal from the superconductor circuit to the magnetic memory element.

19. The system as in claim 18 , wherein the super-conductive link is a super-conductive microstrip link on which to convey the magnetic signal from the superconductor circuit to the magnetic memory element.

20. The system as in claim 16 , wherein the link is a microstrip link on which to convey the magnetic signal from the superconductor circuit to the magnetic memory element.

21. A method comprising:

receiving a request to access a magnetic memory element;

in accordance with the request, utilizing a superconductor circuit to generate a magnetic signal; and

transmitting the magnetic signal over an electrically conductive link to the magnetic memory element to access the magnetic memory element; and

wherein an output impedance of the superconductor circuit is substantially matched to an impedance of the magnetic memory element.

22. The method as in claim 21 , wherein utilizing the superconductor circuit to generate the magnetic signal includes utilizing a single flux quantum line driver to generate a single flux quantum signal; and

wherein transmitting the magnetic signal over the electrically conductive link includes transmitting the single flux quantum signal over the electrically conductive link to access the magnetic memory element.

23. The method as in claim 21 , wherein the superconductor circuit is a single flux quantum comparator circuit, the method further comprising:

utilizing the single flux quantum comparator circuit to detect a logic state of the magnetic memory element, the single flux quantum comparator circuit sensing a resistance change in the magnetic memory element.

24. The method as in claim 21 , wherein the magnetic signal is a quantum-based signal; and

wherein utilizing the superconductor circuit includes implementing at least one Josephson junction to generate the quantum-based signal.

25. The method as in claim 21 , wherein transmitting the magnetic signal over the electrically conductive link includes:

transmitting the magnetic signal from the superconductor circuit over a microstrip line to the magnetic memory element.

26. The method as in claim 25 , wherein transmitting the magnetic signal over the electrically conductive link includes:

transmitting the magnetic signal from the superconductor circuit over a super-conductive microstrip line to the magnetic memory element.

27. The method as in claim 21 further comprising:

utilizing a magnetic polarizer in a magnetic switchable layer in the magnetic memory element.

28. The method as in claim 21 further comprising:

maintaining a temperature of components including the superconductor circuit, the electrically conductive link, and the magnetic memory element below a threshold temperature; and

operating the components in a super-conductive mode.

29. The method as in claim 21 , wherein transmitting the magnetic signal over the electrically conductive link includes:

transmitting the magnetic signal from the superconductor circuit over a super-conductive link to the magnetic memory element.

30. A method comprising:

utilizing a superconductor circuit to generate a magnetic signal, the magnetic signal including data;

transmitting the magnetic signal over a conductive link to a magnetic memory element, the conductive link being a microstrip line, the microstrip line fabricated in a hybrid electronic semiconductor chip in which the superconductor circuit and the magnetic memory element are fabricated; and

storing the data in the magnetic memory element.

31. The method as in claim 30 , wherein the magnetic signal is a single flux quantum signal, the method further comprising:

utilizing a single flux quantum line driver in the superconductor circuit to generate the single flux quantum signal; and

wherein transmitting the magnetic signal includes transmitting the single flux quantum signal over the microstrip line to store the data in the magnetic memory element.

32. The method as in claim 30 further comprising:

subsequent to storing the data in the magnetic memory element, utilizing a single flux quantum comparator circuit to detect a logic state of the magnetic memory element, the single flux quantum comparator circuit sensing a resistance change in the magnetic memory element to detect the logic state.

33. The method as in claim 30 , wherein the microstrip line is a super-conductive microstrip line, the method further comprising:

transmitting the magnetic signal from the superconductor circuit over the super-conductive microstrip line to the magnetic memory element.

34. The method as in claim 30 further comprising:

during an operation of transmitting the magnetic signal over the conductive link, maintaining a temperature of components including the superconductor circuit, the microstrip line, and the magnetic memory element below a threshold temperature.

Assignments (4)
CHANGE OF NAME Recorded Aug 22, 2024
From: RAYTHEON BBN TECHNOLOGIES CORP.
To: RTX BBN TECHNOLOGIES, INC.
Reel/Frame 068748/0419 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2014
From: OHKI, THOMAS AKIRA
To: RAYTHEON BBN TECHNOLOGIES CORP.
Reel/Frame 033234/0543 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 3, 2012
From: OHKI, THOMAS AKIRA
To: RAYTHEON BBN TECHNOLOGIES CORP.
Reel/Frame 028481/0710 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2012
From: KENT, ANDREW
To: NEW YORK UNIVERSITY
Reel/Frame 028251/0521 →
Continuity (2)
Provisional Application 61496455 · Jun 13, 2011
Related Publication 20120314490A1 · Dec 13, 2012