Silicon controlled rectifier (SCR) clamp including metal insulator transition (MIT) resistor
Aspects of the invention provide for an electrostatic discharge (ESD) clamp. In one embodiment, the ESD clamp includes: a silicon controlled rectifier (SCR); and a trigger circuit for providing a tunable trigger voltage to turn on the SCR, the trigger circuit including a metal-insulator transition (MIT) material. The trigger circuit includes an MIT resistor that includes a width and a length that tunes the trigger voltage to a desired voltage.
1. An electrostatic discharge (ESD) clamp, comprising:
a silicon controlled rectifier (SCR); and
a trigger circuit for providing a tunable trigger voltage to turn on the SCR, the trigger circuit including a metal-insulator transition (MIT) resistor, wherein a width and a length of the MIT resistor are varied to tune the trigger voltage to a desired voltage.
2. The ESD clamp of claim 1 , wherein the MIT material includes one of the following: vanadium oxide (VO2), V2O5, or V2O3.
3. The ESD clamp of claim 1 , wherein the trigger circuit is connected to an anode of the SCR and a gate of the SCR.
4. The ESD clamp of claim 1 , wherein a switching time of the trigger circuit is at least 0.1 nanoseconds.
5. An integrated circuit (IC), comprising:
a plurality of electrostatic discharge (ESD) clamps for protecting the IC, each of the ESD clamps comprising:
a silicon controlled rectifier (SCR); and
a trigger circuit for providing a tunable trigger voltage to turn on the SCR, the trigger circuit including a metal-insulator transition (MIT)
resistor, wherein a width and a length of the MIT resistor are varied to tune the trigger voltage to a desired voltage.
6. The IC of claim 5 , wherein the MIT material includes one of the following: vanadium oxide (VO2), V2O5, or V2O3.
7. The IC of claim 5 , wherein each trigger circuit is connected to an anode of the SCR and a gate of the SCR.
8. The IC of claim 5 , wherein a switching time of the trigger circuit is at least 0.1 nanoseconds.
9. A design structure tangibly embodied in a machine readable medium for designing, manufacturing, or testing an integrated circuit (IC), the design structure comprising:
a plurality of electrostatic discharge (ESD) clamps for protecting the IC, each of the ESD clamps comprising:
a silicon controlled rectifier (SCR); and
a trigger circuit for providing a tunable trigger voltage to turn on the SCR, the trigger circuit including a metal-insulator transition (MIT) resistor, wherein a width and a length of the MIT resistor are varied to tune the trigger voltage to a desired voltage.
10. The design structure of claim 9 , wherein the MIT material includes one of the following: vanadium oxide (VO2), V2O5, or V2O3.
11. The design structure of claim 9 , wherein each trigger circuit is connected to an anode of the SCR and a gate of the SCR.
12. The design structure of claim 9 , wherein a switching time of each trigger circuit is at least 0.1 nanoseconds.
13. The design structure of claim 9 , wherein the design structure comprises a netlist.
14. The design structure of claim 9 , wherein the design structure resides on storage medium as a data format used for the exchange of layout data of integrated circuits.