IP Library › Granted Patent US 8,929,092
Granted Patent B2
US 8,929,092 · App. 13/504,281 · Granted Jan 6, 2015

Circuit board, and semiconductor device having component mounted on circuit board

Inventors: Shingo Yoshioka (Osaka, JP); Hiroaki Fujiwara (Nara, JP); Hiromitsu Takashita (Osaka, JP); Tsuyoshi Takeda (Osaka, JP)
Assignee: Panasonic Corporation
H05K1/111H05K2203/0307H01L2224/16237H05K3/107H01L2224/81385H01L24/16H05K2201/2072H05K2203/0565H01L2924/3011H05K3/38H01L2224/81191H05K2201/09736H05K3/184H05K2201/0373H01L21/4846H01L24/81H01L23/49811
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Quick Facts
Patent No.
US 8,929,092
App. No.
13/504,281
Granted
Jan 6, 2015
Kind
B2
Abstract

A circuit board includes an electric circuit having a wiring section and a pad section in the surface of an insulating base substrate. The electric circuit is configured such that a conductor is embedded in a circuit recess formed in the surface of the insulating base substrate, and the surface roughness of the conductor is different in the wiring section and the pad section of the electric circuit. In this case, it is preferable that the surface roughness of the conductor in the pad section is greater than the surface roughness of the conductor in the wiring section.

Claims (12)

1. A circuit board in which an electric circuit including a wiring section and a pad section is provided on a surface of an insulating base substrate,

wherein the electric circuit has a configuration in which a conductor is embedded in a circuit recess formed in the surface of the insulating base substrate,

a surface roughness of a bottom surface of the circuit recess is different in the wiring section and the pad section of the electric circuit, and

wherein a ratio (RzT/RzB) between a ten-point average roughness (RzT) of a top surface of the conductor of the pad section and a ten-point average roughness (RzB) of the bottom surface of the circuit recess for the pad section is 0.1 or greater and 2.0 or less (0.1≦(RzT/RzB)≦2.0).

2. The circuit board according to claim 1 ,

wherein the surface roughness of the bottom surface of the circuit recess in the pad section is greater than the surface roughness of the bottom surface of the circuit recess in the wiring section.

3. The circuit board according to claim 2 ,

wherein a ratio (RzPB/RzLB) between a ten-point average roughness (RzPB) of the bottom surface of the circuit recess in the pad section and a ten-point average roughness (RzLB) of the bottom surface of the circuit recess in the wiring section is 2 or greater ((RzPB/RzLB)≧2).

4. The circuit board according to claim 2 ,

wherein fine recesses in a shape of a line, curve, grid, ring, spiral, zig-zag and/or dot are formed in the bottom surface of the circuit recess in the pad section when planarly viewed, as a result of which the surface roughness of the bottom surface of the circuit recess in the pad section is greater than the surface roughness of the bottom surface of the circuit recess in the wiring section.

5. The circuit board according to claim 4 ,

wherein fine recesses in a shape of a line, curve, grid, ring, spiral, zig-zag and/or dot are formed in a surface of the conductor in the pad section when planarly viewed, as a result of the conductor following a shape of the bottom surface of the circuit recess in the pad section.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 8, 2012
From: YOSHIOKA, SHINGO; FUJIWARA, HIROAKI; TAKASHITA, HIROMITSU; TAKEDA, TSUYOSHI
To: PANASONIC CORPORATION
Reel/Frame 028744/0117 →
Priority Claims (5)
JP 2009 251269 · Oct 30, 2009 · national
JP 2009 251378 · Oct 30, 2009 · national
JP 2009 253130 · Nov 4, 2009 · national
JP 2009 253501 · Nov 4, 2009 · national
JP 2009 253502 · Nov 4, 2009 · national
Continuity (1)
Related Publication 20120206891A1 · Aug 16, 2012