IP Library › Granted Patent US 8,766,837
Granted Patent B2
US 8,766,837 · App. 13/522,836 · Granted Jul 1, 2014

Modulator and ΔΣ-type D/A converter

Inventors: Tetsuya Kajita (Tokyo, JP); Seita Nashimoto (Tokyo, JP); Naoki Nagashima (Tokyo, JP); Kouji Okuda (Tokyo, JP)
Assignee: Azbil Corporation
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Quick Facts
Patent No.
US 8,766,837
App. No.
13/522,836
Granted
Jul 1, 2014
Kind
B2
Abstract

The disclosed device easily and precisely satisfies a requested output range, and is provided with: a ΔΣ-modulator ( 12 ) which converts a digital input signal to a pulse signal; an input comparison device ( 11 ) which compares an input value that corresponds to the digital input signal, and a pre-set threshold value; and a thinned output control unit ( 14 ) which, when the result of the comparison by the input comparison device ( 11 ) shows that the input value is less than the threshold value, reduces the output value corresponding to the input value in accordance with the size of the difference between the input value and the threshold value, and sets the output value to 0 when the input value is 0.

Claims (33)

1. A modulator comprising:

a ΔΣ modulator that converts a digital input signal into a pulse signal;

a comparator that compares a value of the digital input signal to a threshold value that is set in advance; and

an output controller that more greatly reduces an output value relative to the value of the digital input signal as a difference between the value of the digital input signal and the threshold value becomes greater when a comparison result by the comparator indicates that the value of the digital input signal is smaller than the threshold value.

2. The modulator as set forth in claim 1 , wherein:

the output controller segments the pulse signal that is output from the ΔΣ modulator into pulse trains comprising a number of pulses equal to a difference between the threshold value and a specific minimum value, and reduces the output value relative to the value of the digital input signal by forcibly tying low to a value for a number of pulses equal to the difference between the input value and the threshold value, of the pulses included in each of the pulse trains.

3. The modulator as set forth in claim 1 , wherein:

the output controller sets the output value corresponding to the value of the digital input signal to a value corresponding to a minimum value when the value of the digital input signal is the minimum value that is input as the value of the digital input signal.

4. A ΔΣ-type D/A converter comprising:

a modulator as set forth in claim 1 ; and

an analog filter that smoothes the output signal from the modulator.

5. A modulator comprising:

a ΔΣ modulator that coverts a digital input signal into a pulse signal;

a comparator that compares a value of the digital input signal to a threshold value that is set in advance; and

an output controller that more greatly increases an output value relative to the value of the digital input signal as a difference between the value of the digital input signal and the threshold value becomes greater when a comparison result by the comparator indicates that the value of the digital input signal is greater than the threshold value.

6. A modulator as set forth in claim 5 , wherein:

the output controller segments the pulse signal that is output from the ΔΣ modulator into pulse trains comprising a number of pulses equal to a difference between a specific maximum value and the threshold value, and increases the output value relative to the value of the digital input signal by forcibly tying high to a value for a number of pulses equal to the difference between the input value and the threshold value, of the pulses included in each of the pulse trains.

7. The modulator as set forth in claim 5 , wherein:

the output controller sets the output value corresponding to the value of the digital input signal to a value corresponding to a maximum value when the value of the digital input signal is the maximum value that is input as the value of the digital input signal.

8. A ΔΣ-type D/A converter comprising:

a modulator as set forth in claim 5 ; and

an analog filter that smoothes the output signal from the modulator.

9. A modulator comprising:

a ΔΣ modulator converting a digital input signal into a pulse signal;

a first comparator comparing an input signal, corresponding to the digital input signal, to a first threshold value that is set in advance;

a second comparator comparing an input signal, corresponding to the digital input signal, to a second threshold value that is set in advance;

a first output controller more greatly reducing the output value relative to the input value the greater the difference between the input value and the first threshold value when the comparison result by the first comparator indicates that the input value is smaller than the first threshold value; and

a second output controller more greatly increasing the output value relative to the input value the greater the difference between the input value and the second threshold value when the comparison result by the second comparator indicates that the input value is greater than the second threshold value.

10. The modulator as set forth in claim 9 , wherein:

the difference between the first threshold value and the minimum value that is input as the input value is equal to the difference between the second threshold value and the maximum value that is input as the input value.

11. A ΔΣ-type D/A converter comprising:

a modulator as set forth in claim 9 ; and

an analog filter smoothing the output signal from the modulator.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2012
From: KAJITA, TETSUYA; NASHIMOTO, SEITA; NAGASHIMA, NAOKI; OKUDA, KOUJI
To: AZBIL CORPORATION
Reel/Frame 028577/0858 →
Priority Claims (1)
JP 2010-010833 · Jan 21, 2010 · national
Continuity (1)
Related Publication 20120286982A1 · Nov 15, 2012