IP Library Granted Patent US 9,142,516
Granted Patent B2
US 9,142,516 · App. 13/525,719 · Granted Sep 22, 2015

Semiconductor device and manufacturing method therefor

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Quick Facts
Patent No.
US 9,142,516
App. No.
13/525,719
Granted
Sep 22, 2015
Kind
B2
Abstract

A semiconductor device includes a plurality of protrusions formed on a first face of the semiconductor device; first bonding portions formed on upper portions of the plurality of protrusions; second bonding portions formed on side faces of the plurality of protrusions; and third bonding portions formed on the first face between the plurality of protrusions, wherein the semiconductor device is configured to bond to an other semiconductor device through the third from the first bonding portions.

Claims (20)

1. A semiconductor device comprising:

a plurality of protrusions formed on a first face of the semiconductor device;

first conductive bonding portions formed on upper portions of the plurality of protrusions;

second conductive bonding portions formed on side faces of the plurality of protrusions; and

third conductive bonding portions formed on the first face between the plurality of protrusions,

wherein the second conductive bonding portions are separated into upper portion sides and lower portion sides of the plurality of protrusions, each one of the upper portion sides is connected to each one of the first conductive bonding portions, each one of the lower portion sides is connected to at least one of the third conductive bonding portions,

the plurality of protrusions are formed of insulator, and

the first bonding portions are connected to an internal circuit of the semiconductor device through conductors passing through the plurality of protrusions and isolated from the lower portion sides,

wherein the semiconductor device is configured to bond to an other semiconductor device through the third from the first bonding portions.

2. The semiconductor device according to claim 1 ,

wherein the semiconductor device is bonded to the other semiconductor device through protruding electrode formed on each the first bonding portions.

3. A multichip semiconductor device comprising:

a first semiconductor device and a second semiconductor device each including a plurality of protrusions formed on a first face of each semiconductor device, first conductive bonding portions formed on upper portions of the plurality of protrusions, second conductive bonding portions formed on side faces of the plurality of protrusions, and third conductive bonding portions formed on the first face between the plurality of protrusions,

wherein the second conductive bonding portions are separated into upper portion sides and lower portion sides of the plurality of protrusions, each one of the upper portion sides is connected to each one of the first conductive bonding portions, each one of the lower portion sides is connected to at least one of the third conductive bonding portions,

the plurality of protrusions are formed of insulator, and

the first bonding portions are connected to an internal circuit of the semiconductor device through conductors passing through the plurality of protrusions and isolated from the lower portion sides,

wherein the first semiconductor device and the second semiconductor device are bonded together in a state that the respective second bonding portions provided on the plurality of protrusions disposed to face each other are adjacent to each other.

4. The multichip semiconductor device according to claim 3 ,

wherein the third bonding portions of the second semiconductor device are connected to an internal circuit of the second semiconductor device through conductors provided in through substrate via holes.

5. The multichip semiconductor device according to claim 3 , wherein the respective upper portion sides of the second bonding portions of the first semiconductor device and the second semiconductor device are bonded to the respective lower portion sides portions of the first semiconductor device and the second semiconductor device by a bonding material; and, configured to form insulating gaps between adjacent first bonding portions and third bonding portions.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 17, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035453/0904 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 19, 2012
From: TAKENAKA, MASASHI; YAMAMOTO, KATSUYOSHI
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 028399/0104 →