Group III nitride crystal substrate, epilayer-containing group III nitride crystal substrate, semiconductor device and method of manufacturing the same

1. A semiconductor device comprising a group III nitride crystal substrate and at least one semiconductor layer provided by epitaxial growth on a main surface of said crystal substrate, wherein,

a plane spacing of arbitrary specific parallel crystal lattice planes of said crystal substrate being obtained from X-ray diffraction measurement performed with variation of X-ray penetration depth from a main surface of said crystal substrate while X-ray diffraction conditions of said specific parallel crystal lattice planes of said crystal substrate are satisfied,

a uniform distortion at a surface layer of said crystal substrate represented by a value of |d 1 −d 2 |/d 2 is equal to or lower than 1.7×10 −3 where d 1 indicates a plane spacing at said X-ray penetration depth of 0.3 μm and d 2 indicates a plane spacing at said X-ray penetration depth of 5 μm, and wherein

a plane orientation of said main surface has an inclination angle equal to or greater than −10° and equal to or smaller than 10° in a [0001] direction with respect to any of {10-10}, {11-20} and {21-30} planes of said crystal substrate,

wherein said semiconductor layer includes a light emitting layer emitting light having a peak wavelength equal to or more than 500 nm and equal to or less than 550 nm.

2. A semiconductor device comprising a group III nitride crystal substrate and at least one semiconductor layer provided by epitaxial growth on a main surface of said crystal substrate, wherein,

on a diffraction intensity profile of arbitrary specific parallel crystal lattice planes of said crystal substrate being obtained from X-ray diffraction measurement performed with variation of X-ray penetration depth from a main surface of said crystal substrate while X-ray diffraction conditions of said specific parallel crystal lattice planes are satisfied,

an irregular distortion at a surface layer of said crystal substrate represented by a value of |v 1 −v 2 | obtained from a half value width v 1 of a diffraction intensity peak at said X-ray penetration depth of 0.3 μm and a half value width v 2 of the diffraction intensity peak at said X-ray penetration depth of 5 μm is equal to or lower than 110 arcsec, and wherein

a plane orientation of said main surface has an inclination angle equal to or greater than −10° and equal to or smaller than 10° in a [0001] direction with respect to any of {10-10}, {11-20} and {21-30} planes of said crystal substrate, wherein said semiconductor layer includes a light emitting layer emitting light having a peak wavelength equal to or more than 500 nm and equal to or less than 550 nm.

3. A semiconductor device comprising a group III nitride crystal substrate and at least one semiconductor layer provided by epitaxial growth on a main surface of said crystal substrate, wherein,

on a rocking curve being measured by varying an X-ray penetration depth from a main surface of said crystal substrate in connection with X-ray diffraction of arbitrary specific parallel crystal lattice planes of said crystal substrate,

a plane orientation deviation of said specific parallel crystal lattice planes of a surface layer of said crystal substrate represented by a value of |w 1 −w 2 | obtained from a half value width w 1 of a diffraction intensity peak at said X-ray penetration depth of 0.3 μm and a half value width w 2 of the diffraction intensity peak at said X-ray penetration depth of 5 μm is equal to or lower than 300 arcsec, and wherein

a plane orientation of said main surface has an inclination angle equal to or greater than −10° and equal to or smaller than 10° in a [0001] direction with respect to any of {10-10}, {11-20} and {21-30} planes of said crystal substrate, wherein said semiconductor layer includes a light emitting layer emitting light having a peak wavelength equal to or more than 500 nm and equal to or less than 550 nm.

4. The semiconductor device according to claim 1 , wherein said main surface has a surface roughness Ra of 5 nm or lower.

5. The semiconductor device according to claim 1 , wherein the plane orientation of said main surface has an inclination angle equal to or greater than 0° and smaller than 0.1° with respect to any of {10-10}, {11-20} and {21-30} planes of said crystal substrate so as to be substantially parallel thereto.

6. The semiconductor device according to claim 1 , wherein the plane orientation of said main surface has an inclination angle equal to or greater than 0.1° and equal to or smaller than 10° with respect to any of {10-10}, {11-20} and {21-30} planes of said crystal substrate.

7. The semiconductor device according to claim 1 , wherein oxygen present at said main surface has a concentration of equal to or more than 2 at. % and equal to or less than 16 at. %.

8. The semiconductor device according to claim 1 , wherein a dislocation density at said main surface is equal to or less than 1×10 7 cm −2 .

9. The semiconductor device according to claim 1 , having a diameter equal to or more than 40 mm and equal to or less than 150 mm.

10. A method of manufacturing a semiconductor device, comprising the steps of:

preparing a group III nitride crystal substrate by chemically mechanically polishing a main surface of said crystal substrate in the condition of a contact coefficient C being equal to or greater than 1.2×10 −6 m and equal to or smaller than 1.8×10 −6 m with a slurry whose a value X of pH and a value Y of an oxidation-reduction potential satisfy the relation of −50X+1400<Y<−50X+1700, wherein,

a plane spacing of arbitrary specific parallel crystal lattice planes of said crystal substrate being obtained from X-ray diffraction measurement performed with variation of X-ray penetration depth from a main surface of said crystal substrate while X-ray diffraction conditions of said specific parallel crystal lattice planes of said crystal substrate are satisfied,

a uniform distortion at a surface layer of said crystal substrate represented by a value of |d 1 −d 2 |/d 2 is equal to or lower than 1.7×10 −3 where d 1 indicates a plane spacing at said X-ray penetration depth of 0.3 μm and d 2 indicates a plane spacing at said X-ray penetration depth of 5 μm, and wherein

a plane orientation of said main surface has an inclination angle equal to or greater than −10° and equal to or smaller than 10° in a [0001] direction with respect to any of {10-10}, {11-20} and {21-30} planes of said crystal substrate; and

epitaxially growing at least one semiconductor layer on said main surface of said crystal substrate, thereby forming an epilayer-containing group III nitride crystal substrate,

wherein said semiconductor layer is configured to include a light emitting layer emitting light having a peak wavelength equal to or more than 500 nm and equal to or less than 550 nm.

11. A method of manufacturing a semiconductor device, comprising the steps of:

preparing a group III nitride crystal substrate by chemically mechanically polishing a main surface of said crystal substrate in the condition of a contact coefficient C being equal to or greater than 1.2×10 −6 m and equal to or smaller than 1.8×10 −6 m with a slurry whose a value X of pH and a value Y of an oxidation-reduction potential satisfy the relation of −50X+1400<Y<−50X+1700, wherein,

on a diffraction intensity profile of arbitrary specific parallel crystal lattice planes of said crystal substrate being obtained from X-ray diffraction measurement performed with variation of X-ray penetration depth from a main surface ( 1 s ) of said crystal substrate while X-ray diffraction conditions of said specific parallel crystal lattice planes are satisfied,

an irregular distortion at a surface layer of said crystal substrate represented by a value of |v 1 −v 2 | obtained from a half value width v 1 of a diffraction intensity peak at said X-ray penetration depth of 0.3 μm and a half value width v 2 of the diffraction intensity peak at said X-ray penetration depth of 5 μm is equal to or lower than 110 arcsec, and wherein

a plane orientation of said main surface has an inclination angle equal to or greater than −10° and equal to or smaller than 10° in a [0001] direction with respect to any of {10-10}, {11-20} and {21-30} planes of said crystal substrate; and

epitaxially growing at least one semiconductor layer on said main surface of said crystal substrate, thereby forming an epilayer-containing group III nitride crystal substrate,

wherein said semiconductor layer is configured to include a light emitting layer emitting light having a peak wavelength equal to or more than 500 nm and equal to or less than 550 nm.

12. A method of manufacturing a semiconductor device, comprising the steps of:

preparing a group III nitride crystal substrate by chemically mechanically polishing a main surface of said crystal substrate in the condition of a contact coefficient C being equal to or greater than 1.2×10 −6 m and equal to or smaller than 1.8×10 −6 m with a slurry whose a value X of pH and a value Y of an oxidation-reduction potential satisfy the relation of −50X+1400<Y<−50X+1700, wherein,

on a rocking curve being measured by varying an X-ray penetration depth from a main surface of said crystal substrate in connection with X-ray diffraction of arbitrary specific parallel crystal lattice planes of said crystal substrate,

a plane orientation deviation of said specific parallel crystal lattice planes of a surface layer of said crystal substrate represented by a value of |w 1 −w 2 | obtained from a half value width w 1 of a diffraction intensity peak at said X-ray penetration depth of 0.3 μm and a half value width w 2 of the diffraction intensity peak at said X-ray penetration depth of 5 μm is equal to or lower than 300 arcsec, and wherein

a plane orientation of said main surface has an inclination angle equal to or greater than −10° and equal to or smaller than 10° in a [0001] direction with respect to any of {10-10}, {11-20} and {21-30} planes of said crystal substrate; and

forming an epilayer-containing group III nitride crystal substrate by epitaxially growing at least one semiconductor layer on said main surface of said crystal substrate,

wherein said semiconductor layer is configured to include a light emitting layer emitting light having a peak wavelength equal to or more than 500 nm and equal to or less than 550 nm.