Interposers including fluidic microchannels and related structures and methods
View Patent ↗Interposers for use in the fabrication of electronic devices include semiconductor-on-insulator structures having fluidic microchannels therein. The interposers may include a multi-layer body in which a semiconductor material is bonded to a substrate with a layer of dielectric material between the semiconductor material and the substrate. At least one fluidic microchannel may extend in a lateral direction through at least one of the layer of dielectric material and the semiconductor material. The interposers may include redistribution layers and electrical contacts on opposing sides thereof. Semiconductor structures include one or more semiconductor devices coupled with such interposers. Such interposers and semiconductor structures may be formed by fabricating a semiconductor-on-insulator type structure using a direct bonding method and defining one or more fluidic microchannels at a bonding interface during the direct bonding process.
1. A method of fabricating a semiconductor structure including an interposer comprising a semiconductor-on-insulator (SOI) structure, comprising:
forming an SOI structure including a substrate, a layer of semiconductor material, and dielectric material between the substrate and the layer of semiconductor material, comprising:
forming at least one laterally extending recess in at least one of a first dielectric material on the substrate and a second dielectric material on a layer of semiconductor material of a donor structure; and
transferring the layer of semiconductor material from the donor structure to the substrate by establishing dielectric-to-dielectric atomic bonds directly between the first dielectric material on the substrate and the second dielectric material on the semiconductor material and defining at least one fluidic microchannel within the dielectric material of the SOI structure between the first dielectric material and the second dielectric material at an interface between the first dielectric material and the second dielectric material;
forming at least one vertically oriented electrically conductive via extending at least partially through the SOI structure;
providing at least one redistribution layer on the SOI structure including at least one laterally extending conductive trace;
providing at least one electrical contact on a first major surface of the SOI structure;
providing at least one electrical contact on a second major surface of the SOI structure on a side thereof opposite the first major surface; and
forming an electrical pathway extending through the SOI structure from the at least one electrical contact on the first major surface of the SOI structure to the at least one electrical contact on the second major surface of the SOI structure, at least a portion of the electrical pathway extending through the at least one vertically oriented electrically conductive via and through the at least one laterally extending conductive trace.
2. The method of claim 1 , further comprising forming the at least one laterally extending recess to include at least one laterally extending section having a transverse cross-sectional shape entirely surrounded by the first dielectric material and the second dielectric material.
3. The method of claim 1 , further comprising selecting each of the first dielectric material and the second dielectric material to comprise an oxide.
4. The method of claim 3 , further comprising selecting each of the first dielectric material and the second dielectric material to comprise silicon oxide.
5. The method of claim 1 , wherein forming the at least one laterally extending recess in at least one of the first dielectric material on the substrate and the second dielectric material on the semiconductor material comprises forming a first laterally extending recess in the first dielectric material and a second laterally extending recess in the second dielectric material, and wherein bonding the semiconductor material to the substrate comprises aligning the first laterally extending recess with the second laterally extending recess such that the at least one fluidic microchannel is at least partially defined by each of the first laterally extending recess and the second laterally extending recess.
6. The method of claim 1 , further comprising selecting the semiconductor material to comprise a layer of semiconductor material having an average layer thickness in a range extending from about ten nanometers (10 nm) to about one and one-half microns (1.5 μm).
7. The method of claim 1 , wherein transferring the layer of semiconductor material from the donor structure to the substrate comprises:
implanting ions into the donor structure to form a weakened ion implant plane therein;
bonding the donor structure over the substrate; and
fracturing the donor structure along the weakened ion implant plane to separate the layer of semiconductor material from a remainder of the donor structure.
8. The method of claim 1 , further comprising selecting the semiconductor material to comprise silicon.
9. The method of claim 1 , further comprising providing a fluid within the at least one fluidic microchannel.
10. The method of claim 9 , further comprising providing a liquid within the at least one fluidic microchannel.