Power amplifier
View Patent ↗A power amplifier including a MOSFET including a source supplied with a first DC power, a gate connected to an RF input signal, and a drain connected to a power supply terminal of an RF power amplification unit; a supply voltage modulation control unit that determines a DC gate voltage of the MOSFET based on an envelope of the RF input signal; and a bypass circuit connected between the drain and the power supply terminal. The MOSFET outputs a second DC power via the drain and amplifies the RF input signal based on a third DC power substantially identical to a differential between the first and the second DC power, and also outputs an RF power via the drain. The bypass circuit receives and rectifies the RF power to supply a recycled DC power to the power supply terminal of the RF power amplification unit.
1. A power amplifier for receiving and amplifying a radio frequency (RF) input signal and outputting an amplified RF signal, the power amplifier comprising:
an RF power amplification unit configured to amplify the RF input signal;
a metal-oxide semiconductor field-effect transistor (MOSFET) configured as having a source supplied with a first direct current (DC) power, a gate that receives the RF input signal, and a drain connected to a power supply terminal of the RF power amplification unit;
a power detection unit configured to detect an amplitude of the RF input signal and generate an envelope signal based on the detected amplitude;
a supply voltage modulation control unit configured to determine a DC gate voltage of the MOSFET based on the envelope signal; and
a bypass circuit including a first end connected to the drain of the MOSFET and a second end connected to the power supply terminal of the RF power amplification unit,
wherein the MOSFET outputs a second DC power via the drain based on the DC gate voltage, the second DC power being lower than the first DC power,
wherein the MOSFET amplifies the RF input signal based on a third DC power which has a magnitude substantially identical to a differential between the first DC power and the second DC power, and outputs an RF power via the drain thereof, and
wherein the bypass circuit receives and rectifies the RF power output from the drain of the MOSFET, and supplies a recycled DC power to the power supply terminal of the RF power amplification unit responsive to the rectifying.
2. The power amplifier of claim 1 , wherein the MOSFET is a positive-channel metal-oxide semiconductor (PMOS).
3. The power amplifier of claim 1 , wherein the bypass circuit comprises a rectifier circuit.
4. The power amplifier of claim 3 , wherein the bypass circuit further comprises a RF choke circuit connected to an output terminal of the rectifier circuit.
5. The power amplifier of claim 4 , wherein the RF choke circuit is an inductor.
6. The power amplifier of claim 4 , wherein the rectifier circuit and the RF choke circuit are connected in series to each other.
7. The power amplifier of claim 1 , further comprising an interference prevention unit connected between the drain of the MOSFET and the power supply terminal of the RF power amplification unit.
8. The power amplifier of claim 7 , wherein the interference prevention unit comprises an inductor.
9. The power amplifier of claim 1 , wherein the RF power amplification unit comprises a field-effect transistor (FET).
10. The power amplifier of claim 1 , wherein the RF power amplification unit comprises a bipolar junction transistor (BJT).
11. A power amplifier comprising:
an amplification unit configured to provide an amplified RF signal as an output of the power amplifier responsive to an RF input signal;
a power detector configured to provide an envelope signal responsive to the RF input signal;
a supply voltage controller configured to provide a direct current (DC) gate voltage responsive to the envelope signal;
a transistor connected to a first DC power and configured to provide a second DC power and amplified RF power responsive to the DC gate voltage and the RF input signal; and
a bypass circuit configured to rectify the amplified RF power and provide recycled DC power to the power supply terminal of the amplification unit.
12. The power amplifier of claim 11 , wherein the transistor is a metal-oxide semiconductor field-effect transistor configured to have a gate connected to the DC gate voltage and the RF input signal, a source connected to the first DC power and a drain connected to the power supply terminal of the amplification unit.
13. The power amplifier of claim 11 , wherein the transistor amplifies the RF input signal based on a third DC power which has a magnitude substantially identical to a differential between the first DC power and the second DC power.
14. The power amplifier of claim 11 , wherein the bypass circuit comprises:
a rectifier connected to the amplified RF power; and
an RF choke configured to provide the recycled DC power responsive to an output of the rectifier.
15. The power amplifier of claim 11 , wherein the amplification unit comprises a field-effect transistor.
16. The power amplifier of claim 11 , wherein the amplification unit comprises a bipolar junction transistor.
17. The power amplifier of claim 11 , further comprising an interference prevention unit connected between the amplification unit and the transistor, and configured to prevent amplification by the amplification unit and amplification by the transistor from interfering with each other.
18. The power amplifier of claim 17 , wherein the interference prevention unit comprises an inductor.