COMPOUND SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A compound semiconductor device includes an electron transit layer having a first polarity, a p-type cap layer which is formed above the electron transit layer and has a second polarity, and an n-type cap layer which is formed on the p-type cap layer and has the first polarity. The n-type cap layer includes portions having different thicknesses.
1 . A compound semiconductor device comprising:
a first compound semiconductor layer comprising a first polarity;
a second compound semiconductor layer formed above the first compound semiconductor layer, the second compound semiconductor layer comprising a second polarity; and
a third compound semiconductor formed above the second compound semiconductor layer, the third compound semiconductor layer comprising the first polarity;
wherein the third compound semiconductor layer comprises a portion comprising a different thickness.
2 . The compound semiconductor device according to claim 1 , wherein the first polarity is negative.
3 . The compound semiconductor device according to claim 1 , wherein a through-opening is formed in the third compound semiconductor layer; and
the compound semiconductor device further comprises a gate electrode which fills the through-opening.
4 . The compound semiconductor device according to claim 1 , further comprising a field-plate electrode formed on the third compound semiconductor layer.
5 . The compound semiconductor device according to claim 4 , wherein the field-plate electrode is formed on a thin portion of the third compound semiconductor layer.
6 . The compound semiconductor device according to claim 1 , further comprising a pair of electrodes formed above the first compound semiconductor layer, the pair of electrodes being on both sides of the third compound semiconductor layer;
wherein a portion of the third compound semiconductor layer that is closer to one of the electrodes is formed thinner than a portion of the third compound semiconductor that is closer to the other electrode.
7 . A method for fabricating a compound semiconductor device, the method comprising:
forming a first compound semiconductor layer comprising a first polarity;
forming a second compound semiconductor layer above the first compound semiconductor layer, the second compound semiconductor layer comprising a second polarity;
forming a third compound semiconductor layer above the second compound semiconductor layer, the third compound semiconductor layer comprising the second polarity; and
forming a portion comprising a different thickness in the third compound semiconductor layer.
8 . The method for fabricating a compound semiconductor device according to claim 7 , wherein the first polarity is negative.
9 . The method for fabricating a compound semiconductor device according to the claim 7 , further comprising:
forming a through-opening in the third compound semiconductor layer; and
forming a gate electrode filling the through-opening.
10 . The method for fabricating a compound semiconductor device according to claim 7 , further comprising forming a field-plate electrode on the third compound semiconductor layer.
11 . The method for fabricating a compound semiconductor device according to claim 10 , wherein the field-plate electrode is formed on a thin portion of the third compound semiconductor layer.
12 . The method for fabricating a compound semiconductor device according to claim 7 , further comprising forming a pair of electrodes above the first compound semiconductor layer, the pair of electrodes being on both sides of the third compound semiconductor layer;
wherein a portion of the third compound semiconductor that is closer to one of the electrodes is formed thinner than a portion of the third compound semiconductor that is closer to the other electrode.
13 . A power supply device comprising a transformer, and a high-voltage circuit and a low-voltage circuit disposed with the transformer between the high-voltage and the low-voltage circuits,
the high-voltage circuit comprising a transistor and a diode, one of the transistor and the diode or both of the transistor and the diode comprising:
a first compound semiconductor layer comprising a first polarity;
a second compound semiconductor layer formed above the first compound semiconductor layer, the second compound semiconductor layer comprising a second polarity; and
a third compound semiconductor layer formed above the second compound semiconductor layer, the third compound semiconductor layer comprising the first polarity;
wherein the third compound semiconductor layer comprises a portion comprising a different thickness.