Semiconductor device with buried bit line and method for fabricating the same

1. A semiconductor device comprising:

a first structure including first trenches defined in a substrate, buried bit lines partially filled in the respective first trenches, and a first source/drain layer filled in remaining portions of the first trenches on the buried bit lines; and

a second structure including stack patterns having a channel layer and a second source/drain layer stacked therein, second trenches exposing sidewalls of the channel layer, word lines filled in the respective second trenches, and a dielectric layer gap-filled spaces between the word lines,

wherein the buried bit lines and the word lines cross with each other, and the first source/drain layer and the channel layer contact with each other.

2. The semiconductor device according to claim 1 , wherein the substrate includes a dielectric layer formed thereon, and the first trenches are defined in the dielectric layer.

3. The semiconductor device according to claim 1 , further comprising:

a punch-through preventing layer formed in the substrate; and

a dielectric layer formed on surfaces of the first trenches.

4. The semiconductor device according to claim 3 , wherein the first trenches are defined in the punch-through preventing layer.

5. The semiconductor device according to claim 1 , wherein a surface of the first source/drain layer and a surface of the substrate are flush with each other.

6. The semiconductor device according to claim 1 , wherein the stack patterns include pillar type patterns disposed at intersections of the word lines with the buried bit lines.

7. The semiconductor device according to claim 6 , wherein the first source/drain layer is disposed between the stack patterns and the buried bit lines at the intersections.

8. The semiconductor device according to claim 7 , further comprising:

a dielectric layer filled in remaining portions of the first trenches between portions of the first source/drain layer on the buried bit lines.

9. The semiconductor device according to claim 1 ,

wherein the word lines partially fill the second trenches, and

wherein the semiconductor device further comprises a dielectric layer filling remaining portions of the second trenches on the word lines.

10. A method for fabricating a semiconductor device, comprising:

defining first trenches in a substrate;

forming buried bit lines to partially fill the first trenches;

forming a first source/drain layer to fill remaining portions of the first trenches on the buried bit lines;

forming stack patterns having a second source/drain layer and a channel layer are stacked therein on a sacrificial substrate;

forming a dielectric layer on the sacrificial substrate to fill spaces between the stack patterns and have second trenches which expose sidewalls of the channel layer;

forming word lines to fill the second trenches;

bonding the substrate and the sacrificial substrate with each other, wherein the buried bit lines and the word lines cross with each other and the first source/drain layer and the channel layer face each other; and

removing the sacrificial substrate.

11. The method according to claim 10 , wherein the stack patterns include pillar type patterns disposed at intersections of the word lines with the buried bit lines.

12. The method according to claim 11 , the forming of the first source/drain layer comprising:

forming a semiconductor layer on the substrate including the buried bit lines;

performing a planarization process until the substrate is exposed;

selectively etching the semiconductor layer to form the first source/drain layer on the buried bit lines at the intersections; and

forming a dielectric layer to fill remaining portions of the first trenches between portions of the first source/drain layer.

13. The method according to claim 10 , the forming of the word lines comprises:

forming the word lines to partially fill the second trenches; and

forming a dielectric layer to fill remaining portions of the second trenches on the word lines.