Via in substrate with deposited layer
View Patent ↗An opening such as a small-diameter via is formed in a semiconductor substrate such as a monocrystalline silicon chip or wafer by a high etch rate process which leaves the opening with a rough interior surface. A smoothing layer such as a polysilicon layer is applied over the interior surfaces of the openings. The smoothing layer presents a surface smoother than the original interior surface. An insulating layer is formed over the smoothing layer or formed from the smoothing layer, and a conductive element such as a metal is formed in the opening. In a variant, a glass-forming material such as BPSG is applied in the opening. The glass-forming material is reflowed to form a glassy insulating layer which presents a smooth surface. The interface between the metal conductive element and the insulating or glassy layer is smooth, which improves mechanical and electrical properties.
1. A semiconductor substrate having:
(a) a body including a substantially monocrystalline semiconductor material, the body having a first surface;
(b) an opening extending into the body from the first surface and including an interior surface, the interior surface being comprised of a sidewall surface extending away from the first surface, a bottom surface joined to the sidewall surface, and a plurality of recesses, the semiconductor material being exposed at the interior surface of the opening;
(c) an insulating layer overlying the interior surface;
(d) a smoothing layer comprised of polysilicon or amorphous silicon, the smoothing layer disposed between the insulating layer and the interior surface and at least a portion of the smoothing layer disposed within the recesses, the smoothing layer being distinct from the insulating layer and from the semiconductor material of the body, the smoothing layer having a surface roughness less than a surface roughness of the interior surface of the opening; and
(e) a conductive element disposed within the opening so that the insulating layer is disposed between the smoothing layer and the conductive element.
2. The substrate as claimed in claim 1 wherein the smoothing layer has a coefficient of thermal expansion substantially equal to a coefficient of thermal expansion of the semiconductor material.
3. The substrate as claimed in claim 1 wherein the semiconductor material of the body has a grain size, and wherein the smoothing layer has a grain size smaller than the grain size of the semiconductor material of the body.
4. The substrate as claimed in claim 1 wherein the each of the semiconductor material of the body and the smoothing layer consists essentially of materials independently selected from the group consisting of silicon and compounds of silicon with one or more elements selected from the group consisting of N, C, H, and O.
5. The substrate as claimed in claim 1 wherein the insulating layer consists essentially of one or more compounds of silicon with one or more elements selected from the group consisting of N, C, H, and O.
6. The substrate as claimed in claim 2 wherein the insulating layer includes a glass.
7. The substrate as claimed in claim 6 wherein the glass includes a boron-containing glass and the conductive element includes copper.
8. A semiconductor substrate having:
(a) a body including a semiconductor material, the body having a first surface;
(b) an opening having a minor diameter of about 500 μm or less extending into the body from the first surface such that the semiconductor material is exposed at an interior surface of the opening, the interior surface of the opening being comprised of a sidewall surface extending away from the first surface, a bottom surface joined to the sidewall surface, and a plurality of recesses, the interior surface having a first surface roughness of at least 100 nm;
(c) an insulating layer overlying the interior surface, the insulating layer having a surface roughness of less than 20 nm; and
(d) a smoothing layer, at least portions of the smoothing layer and the body integrally formed with the insulating layer, and at least portions of the smoothing layer disposed within the recesses.
9. The substrate as claimed in claim 8 wherein the insulating layer consists essentially of one or more compounds of silicon with one or more elements selected from the group consisting of N, C, H, and O.
10. The substrate as claimed in claim 8 further comprising an electrically conductive element disposed within the opening so that the insulating layer is disposed between the conductive element and the body.
11. A microelectronic substrate having:
(a) a body having a first surface;
(b) an opening extending into the body from the first surface such that material of the body defines an interior surface of the opening, the interior surface being comprised of a sidewall surface extending away from the first surface, a bottom surface joined to the sidewall surface, and a plurality of recesses, the material comprising a semiconductor, the interior surface of the opening having a first surface roughness;
(c) a monocrystalline smoothing layer overlying the interior surface, the smoothing layer including a glass and having a surface roughness less than the first surface roughness, at least a portion of the smoothing layer being disposed within the recesses; and
(d) an electrically conductive element disposed within the opening so that the smoothing layer is disposed between the conductive element and the body.
12. The substrate as claimed in claim 11 , wherein the electrically conductive element includes copper.
13. The substrate as claimed in claim 1 , wherein the monocrystalline semiconductor material is a monolithic monocrystalline semiconductor material.