Semiconductor device and method for manufacturing the same
View Patent ↗It is made possible to provide a method for manufacturing a semiconductor device that has a high-quality insulating film in which defects are not easily formed, and experiences less leakage current. A method for manufacturing a semiconductor device, includes: forming an amorphous silicon layer on an insulating layer; introducing oxygen into the amorphous silicon layer; and forming a silicon oxynitride layer by nitriding the amorphous silicon layer having oxygen introduced thereinto.
1. A semiconductor device comprising:
a silicon substrate;
a tunnel insulating film formed on the silicon substrate, the tunnel insulating film including silicon, oxygen and nitrogen, a nitrogen concentration distribution having a first peak and a second peak in a direction of a film thickness of the tunnel insulating film, a maximum of the first peak and a maximum of the second peak being located in the tunnel insulating film, the first peak being located close to the silicon substrate compared with the second peak, the first peak being higher than the second peak;
a floating gate electrode formed on the tunnel insulating film;
an inter-electrode insulating film formed on the floating gate electrode; and
a control electrode formed on the inter-electrode insulating film,
wherein the second peak has a control electrode-sided tail extending to the floating gate electrode.
2. The device according to claim 1 , wherein the maximum of the first peak is in range of 20 atomic % to 47 atomic %.
3. The device according to claim 1 , wherein the first peak has a substrate-side tail included in the tunnel insulating film.
4. The device according to claim 1 , wherein the first peak has a continuous region where nitrogen concentration is 20 atomic % or higher, and the continuous region has a physical film thickness of 1 nm or more.
5. The device according to claim 4 , wherein the continuous region of the first peak is in a region 5 nm or less from an upper face of the tunnel insulating film.
6. The device according to claim 1 , wherein a distance between the maximum of the first peak and a surface of the silicon substrate is longer than a distance between the maximum of the second peak and an upper face of the tunnel insulating film.
7. The device according to claim 1 , wherein the first peak has a substrate-side tail, and the substrate-side tail is steeper than the control electrode-sided tail of the second peak.
8. The device according to claim 1 , wherein the inter-electrode insulating film is a laminated film including a silicon oxide layer and an alumina layer.
9. The device according to claim 1 , comprising: memory cells arranged in a matrix form, each of memory cells including the tunnel insulating film, the floating gate electrode, the inter-electrode insulating film, and the control electrode.
10. A semiconductor device, comprising:
a silicon region;
a tunnel insulating film formed on the silicon region, the tunnel insulating film including silicon, oxygen and nitrogen, a nitrogen concentration distribution having a first peak and a second peak in a direction of a film thickness of the tunnel insulating film, a maximum of the first peak and a maximum of the second peak being located in the tunnel insulating film, the first peak being located close to the silicon substrate compared with the second peak, the first peak being higher than the second peak;
a charge storage film formed on the tunnel insulating film;
an insulating film formed on the charge storage film; and
a control electrode formed on the insulating film,
wherein the seconds peak has a control electrode-sided tail extending to the charge storage film.
11. The device according to claim 10 , wherein the maximum of the first peak is in range of 20 atomic % to 47 atomic %.
12. The device according to claim 10 , wherein the first peak has a silicon-region-side tail included in the tunnel insulating film.
13. The device according to claim 10 , wherein the first peak has a continuous region where nitrogen concentration is 20 atomic % or higher, and the continuous region has a physical film thickness of 1 nm or more.
14. The device according to claim 13 , wherein the continuous region of the first peak is in a region 5 nm or less from an upper face of the tunnel insulating film.
15. The device according to claim 10 , wherein a distance between the maximum of the first peak and a surface of the silicon region is longer than a distance between the maximum of the second peak and an upper face of the tunnel insulating film.
16. The device according to claim 10 , wherein the first peak has a silicon-region-side tail, and the silicon-region-side tail is steeper than the control electrode-sided tail of he second peak.
17. The device according to claim 10 , wherein the insulating film is a laminated film including a silicon oxide layer and an alumina layer.
18. The device according to claim 10 , comprising: memory cells arranged in a matrix form, each of memory cells including the tunnel insulating film, the charge storage film, the insulating film, and the control electrode.