IP Library Granted Patent US 8,923,643
Granted Patent B2
US 8,923,643 · App. 13/563,466 · Granted Dec 30, 2014

Image processing circuit and image processing method

Inventors: Yen-Sung Chen (New Taipei, TW); Tsui-Chin Chen (Hsinchu, TW); Yu-Tsung Hu (Changhua County, TW); Xing-Rui Wang (Shanghai, CN)
Assignee: Novatek Microelectronics Corp.
H04N19/00509H04N19/00587
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Quick Facts
Patent No.
US 8,923,643
App. No.
13/563,466
Granted
Dec 30, 2014
Kind
B2
Abstract

An image processing circuit and an image processing method are disclosed. The image processing circuit comprises a block matching unit, a multiplexer, an arbiter, and a motion compensation circuit. The block matching unit calculates an alternating current (AC) sum of absolute difference (SAD) and a direct current (DC) sum of absolute difference (SAD) according to a current block in a current image and a reference block in a reference image. The arbiter controls the multiplexer selectively to output the AC SAD or the DC SAD according to an arbitration rule related to a scene characteristic of the current image. The motion compensation circuit executes motion compensation according to the AC SAD or the DC SAD outputted by the multiplexer.

Claims (23)

1. An image processing circuit, comprising:

a block matching unit used for calculating an alternating current (AC) sum of absolute difference (SAD) and a direct current (DC) sum of absolute difference (SAD) according to a current block in a current image and a reference block in a reference image;

a multiplexer;

an arbiter used for controlling the multiplexer selectively to output the AC SAD or the DC SAD according to an arbitration rule related to a scene characteristic of the current image; and

a motion compensation circuit used for executing motion compensation according to the AC SAD or the DC SAD outputted by the multiplexer.

2. The image processing circuit according to claim 1 , wherein the current image further comprises a plurality of adjacent blocks adjacent to the current block, the arbitration rule comprises an adjacent-block arbitration rule stating: if the multiplexer correspondingly outputs the AC SAD with respect to the adjacent blocks, then the multiplexer correspondingly outputs the AC SAD with respect to the current block, and if the multiplexer correspondingly outputs the DC SAD with respect to the adjacent blocks, then the multiplexer correspondingly outputs the DC SAD with respect to the current block.

3. The image processing circuit according to claim 2 , wherein the arbitration rule further comprises a difference arbitration rule stating: if the difference between the AC SAD and the DC SAD is greater than the difference threshold, then the multiplexer correspondingly outputs the AC SAD with respect to the current block, and if the difference between the AC SAD and the DC SAD is not greater than the difference threshold, then the multiplexer correspondingly outputs the DC SAD with respect to the current block.

4. The image processing circuit according to claim 3 , wherein the arbiter controls the multiplexer selectively to output the AC SAD or the DC SAD according to the adjacent-block arbitration rule, an adjacent blocks weight, the difference arbitration rule and a difference weight.

5. The image processing circuit according to claim 1 , wherein the arbitration rule comprises a difference arbitration rule stating: if the difference between the AC SAD and the DC SAD is greater than the difference threshold, then the multiplexer correspondingly outputs the AC SAD with respect to the current block, and if the difference between the AC SAD and the DC SAD is not greater than the difference threshold, then the multiplexer correspondingly outputs the DC SAD with respect to the current block.

6. The image processing circuit according to claim 1 , wherein the block matching unit calculates the DC SAD according to the pixel value of the current block and the pixel value of the reference block.

7. The image processing circuit according to claim 1 , wherein the block matching unit calculates the AC SAD according to the DC SAD and a DC difference.

8. The image processing circuit according to claim 1 , wherein the block matching unit calculates the AC SAD according to the pixel value of the current block, the average pixel value of the current block, the pixel value of the reference block and the average pixel value of the reference block.

9. An image processing method, comprising:

calculating an AC sum of absolute difference (SAD) and a DC SAD according to a current block in a current image and a reference block in a reference image;

selectively outputting the AC SAD or the DC SAD according to an arbitration rule related to a scene characteristic of the current image; and

executing motion compensation according to the AC SAD or the DC SAD.

10. The image processing method according to claim 9 , wherein the current image further comprises a plurality of adjacent blocks adjacent to the current block, the arbitration rule comprises an adjacent-block arbitration rule stating: if the AC SAD is correspondingly outputted with respect to the adjacent blocks, then the AC SAD is correspondingly outputted with respect to the current block, and if the DC SAD is correspondingly outputted with respect to the adjacent blocks, then the DC SAD is correspondingly outputted with respect to the current block.

11. The image processing method according to claim 10 , wherein the arbitration rule further comprises a difference arbitration rule stating: if the difference between the AC SAD and the DC SAD is greater than the difference threshold, then the AC SAD is correspondingly outputted with respect to the current block, and if the difference between the AC SAD and the DC SAD is not greater than the difference threshold, then the DC SAD is correspondingly outputted with respect to the current block.

12. The image processing method according to claim 11 , wherein the output step selectively outputs the AC SAD or the DC SAD according to the adjacent-block arbitration rule, an adjacent blocks weight, the difference arbitration rule and a difference weight.

13. The image processing method according to claim 9 , wherein the arbitration rule comprises a difference arbitration rule stating: if the difference between the AC SAD and the DC SAD is greater than the difference threshold, then the AC SAD is correspondingly outputted with respect to the current block, and if the difference between the AC SAD and the DC SAD is not greater than the difference threshold, then the DC SAD is correspondingly outputted with respect to the current block.

14. The image processing method according to claim 9 , wherein the calculation step calculates the DC SAD according to the pixel value of the current block and the pixel value of the reference block.

15. The image processing method according to claim 9 , wherein the calculation step calculates the AC SAD according to the DC SAD and a DC difference.

16. The image processing method according to claim 9 , wherein the calculation step calculates the AC SAD according to the pixel value of the current block, the average pixel value of the current block, the pixel value of the reference block and the average pixel value of the reference block.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 31, 2012
From: CHEN, YEN-SUNG; CHEN, TSUI-CHIN; HU, YU-TSUNG; WANG, XING-RUI
To: NOVATEK MICROELECTRONICS CORP.
Reel/Frame 028691/0190 →
Priority Claims (1)
TW 100127285 A · Aug 1, 2011 · national
Continuity (1)
Related Publication 20130034310A1 · Feb 7, 2013