Electrostatic discharge protection circuit including a distributed diode string

1. An integrated circuit comprising:

a first input/output (I/O) pad;

a second I/O pad;

a first plurality of diodes arranged in series between the first I/O pad and a power supply terminal;

a second plurality of diodes arranged in series between the second I/O pad and the power supply terminal;

a conductor configured to couple a first node within the first plurality of diodes to a second node within the second plurality of diodes such that the first plurality of diodes is electrically coupled to the second plurality of diodes only between the first node and the second node, the first node is located between a first diode of the first plurality of diodes and a last diode of the first plurality of diodes, the second node is located between a first diode of the second plurality of diodes and a last diode of the second plurality of diodes; and

wherein at least one of the first plurality of diodes and the second plurality of diodes comprises a tapered diode string arranged in series and having decreasing diode sizes along a length of the tapered diode string.

2. The integrated circuit of claim 1 , wherein at least one of the first I/O pad and the second I/O pad comprises an input/output (I/O) bond pad.

3. The integrated circuit of claim 1 , wherein a location of the first node and the second node within the first and second pluralities of diodes is programmed to provide a selected amount of charge dissipation.

4. The integrated circuit of claim 3 , wherein:

the first node corresponds to a cathode of a second diode coupled to the first diode in the first plurality of diodes; and

the second node corresponds to a cathode of a second diode coupled to the first diode in the second plurality of diodes.

5. The integrated circuit of claim 1 , wherein the conductor distributes an electrostatic discharge (ESD) charge between the first and second pluralities of diodes.

6. The integrated circuit of claim 1 , further comprising:

a third I/O pad;

a third plurality of diodes arranged in series, the third plurality of diodes including an anode coupled to the third I/O pad and including a cathode coupled to a power supply; and

a second conductor configured to couple a third node of the third plurality of diodes to the second node of the second plurality of diodes.

7. An integrated circuit comprising:

a plurality of input/output (I/O) pads including a first I/O pad and a second I/O pad;

a plurality of diodes including:

at least one first diode coupled between the first I/O pad and a node;

at least one second diode coupled between the second I/O pad and the node; and

a diode string circuit coupled between the node and a power supply node, the diode string circuit comprising a second plurality of diodes arranged in series and having decreasing diode sizes along a length of the series, the diode string circuit shared by at least some of the plurality of I/O pads to provide an electrostatic discharge from one of the first I/O pad and the second I/O pad to the power supply node.

8. The integrated circuit of claim 7 , wherein the diode string circuit includes a plurality of diode strings coupled in parallel with the second plurality of diodes between the node and the power supply node.

9. The integrated circuit of claim 8 , wherein the plurality of diode strings operate to dissipate a portion of an electrostatic discharge (ESD) charge that is provided to the node.

10. The integrated circuit of claim 8 , wherein at least one of the plurality of diode strings comprises a tapered diode string.

11. The integrated circuit of claim 8 , wherein:

at least some of the respective plurality of diode strings include a first diode having first dimensions and at least one second diode having second dimensions; and

the first dimensions are greater than the second dimensions.

12. The integrated circuit of claim 7 , wherein the at least one of the plurality of diodes comprises:

a first diode including an anode coupled to one of the plurality of I/O pads and including a cathode; and

a second diode including an anode coupled to the cathode terminal of the first diode and including a cathode coupled to the node.

13. An integrated circuit comprising:

a first input/output (I/O) pad;

a first diode string comprising a first plurality of diodes coupled in series between the first I/O pad and a power supply, the first diode string including a first node at a first location between a cathode of a first diode of the first diode string and an anode of a last diode of the first diode string;

a second I/O pad;

a second diode string comprising a second plurality of diodes coupled in series between the second I/O pad and the power supply, the second diode string including a second node at a second location between a cathode of a first diode of the second diode string and an anode of a last diode of the second diode string;

a conductor configured to couple the first node and the second node such that the first diode string is electrically coupled to the second diode string only between the first node and the second node; and

wherein at least one of the first plurality of diodes and the second plurality of diodes comprises a tapered diode string having decreasing sizes along a length of the tapered diode string.

14. The integrated circuit of claim 13 , wherein a first location of the first node and a second location of the second node is programmed to provide a selected amount of charge dissipation through the first and second diode strings, respectively.

15. The integrated circuit of claim 14 , wherein:

the first node corresponds to a cathode of a second diode coupled to the first diode in the first plurality of diodes; and

the second node corresponds to cathode of a second diode coupled to the first diode in the second plurality of diodes.

16. The integrated circuit of claim 13 , wherein the conductor distributes an electrostatic discharge (ESD) charge between the first and second pluralities of diodes.

17. The integrated circuit of claim 13 , further comprising:

a third I/O pad;

a third diode string comprising a third plurality of diodes coupled in series between the third I/O pad and the power supply, the third diode string including a third node at a third location between a cathode of a first diode of the third diode string and an anode of a last diode of the third diode string; and

a second conductor configured to couple the third node of the third plurality of diodes to the second node of the second plurality of diodes.