Device with integrated power supply
View Patent ↗Semiconductor devices and methods for forming a semiconductor device are disclosed. The semiconductor device includes a die. The die includes a die substrate having first and second major surfaces. The semiconductor device includes a power module disposed below the second major surface of the die substrate. The power module is electrically coupled to the die through silicon via (TSV) contacts.
1. A semiconductor device comprising:
a die which includes a semiconductor die substrate having first and second major surfaces, the semiconductor die substrate comprises a plurality of vias extending from the first to the second major surface, wherein the vias are completely filled with conductive material to form through silicon via (TSV) contacts; and
a power module disposed on and directly contacts the second major surface of the die substrate, wherein the power module is electrically coupled to the die through the TSV contacts.
2. The semiconductor device of claim 1 wherein the power module comprises at least first and second conductive terminals.
3. The semiconductor device of claim 2 wherein the first major surface is an active substrate surface while the second major surface is an inactive substrate surface.
4. The semiconductor device of claim 3 wherein circuit components are disposed on the first major surface.
5. The semiconductor device of claim 2 wherein:
the first and second conductive terminals are planar conductive terminals; and
the TSV contacts are coupled to the first and second conductive terminals.
6. The semiconductor device of claim 5 wherein one of the at least first and second conductive terminals directly contacts the second major surface of the die substrate.
7. The semiconductor device of claim 5 wherein the power module includes lithium battery cell, solar cell or Nickel-Metal Hydride (NiMH) battery.
8. A semiconductor device comprising:
a die which includes a die substrate having first and second major surfaces;
a power module disposed below the second major surface of the die substrate; and
an interposer having first and second surfaces disposed in between the die and the power module, wherein the power module is electrically coupled to the die through silicon via (TSV) contacts which are disposed within the interposer.
9. The semiconductor device of claim 8 wherein the die is disposed on the first interposer surface while the power module is disposed on the second interposer surface.
10. The semiconductor device of claim 9 wherein the die is coupled to the interposer by TSV contacts within the die substrate or bump connections on the first interposer surface.
11. A method for forming a semiconductor device comprising:
providing a die which includes a semiconductor die substrate having first and second major surfaces, the semiconductor die substrate comprises a plurality of vias extending from the first to the second major surface, wherein the vias are completely filled with conductive material to form through silicon via (TSV) contacts; and
providing a power module on and directly contacts the second major surface of the die substrate, wherein the power module is electrically coupled to the die through the TSV contacts.
12. The method of claim 11 wherein the first major surface is an active substrate surface while the second major surface is an inactive substrate surface.
13. A method for forming a semiconductor device comprising:
providing a die which includes a die substrate having first and second major surfaces;
providing a power module below the second major surface of the die substrate, wherein the power module is electrically coupled to the die through silicon via (TSV) contacts; and
providing an interposer in between the die and the power module.
14. The method of claim 13 comprises forming the TSV contacts within the interposer.
15. A method for forming a semiconductor device comprising:
providing a wafer comprising a semiconductor substrate having first and second major surfaces, the semiconductor substrate comprises a plurality of vias extending from the first to the second major surface, wherein the vias are completely filled with conductive material to form through silicon via (TSV) contacts; and
providing a power module on and directly contacts the second major surface of the semiconductor substrate of the wafer, wherein the power module is electrically coupled to the wafer through the TSV contacts.
16. The method of claim 15 wherein the wafer is processed with a plurality of dies having circuit components on the first major surface of the semiconductor substrate of the wafer.
17. The method of claim 16 wherein:
providing the wafer comprises forming TSV contacts within the semiconductor substrate of the wafer; and comprising
thinning the second major surface of the semiconductor substrate of the wafer to expose bottom surfaces of the TSV contacts.
18. The method of claim 17 wherein providing the power module comprises integrally forming the power module directly on the second major surface of the semiconductor substrate of the wafer, and wherein the second major surface is an inactive substrate surface.
19. The method of claim 15 wherein:
the wafer serves as an interposer wafer, and comprises
forming the TSV contacts within the interposer wafer.
20. The method of claim 19 further comprises providing a die or dies on the first major surface of the interposer wafer.