IP Library Granted Patent US 8,791,028
Granted Patent B2
US 8,791,028 · App. 13/571,981 · Granted Jul 29, 2014

Semiconductor device and manufacturing method of semiconductor device

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Quick Facts
Patent No.
US 8,791,028
App. No.
13/571,981
Granted
Jul 29, 2014
Kind
B2
Abstract

According to one embodiment, a manufacturing method of a semiconductor device includes a step of forming a dummy-fin semiconductor on a semiconductor substrate; a step of forming an insulating layer, into which a lower part of the dummy-fin semiconductor is buried, on the semiconductor substrate; a step of forming a fin semiconductor, which is bonded to a side face at an upper part of the dummy-fin semiconductor, on the insulating layer; and a step of removing the dummy-fin semiconductor on the insulating layer with the fin semiconductor being left on the insulating layer.

Claims (31)

1. A manufacturing method of a semiconductor device comprising:

forming a dummy-fin semiconductor on a semiconductor substrate;

forming an insulating layer, into which a lower part of the dummy-fin semiconductor is buried, on the semiconductor substrate;

forming a fin semiconductor, which is bonded to a side face at an upper part of the dummy-fin semiconductor, on the insulating layer; and

removing the dummy-fin semiconductor on the insulating layer with the fin semiconductor being left on the insulating layer.

2. The manufacturing method of a semiconductor device according to claim 1 , wherein

the dummy-fin semiconductor is made of a material having a higher etching rate than the fin semiconductor.

3. The manufacturing method of a semiconductor device according to claim 1 , wherein

first and second fin semiconductors, each having a different etching rate, are alternately and repeatedly formed on the insulating layer in the lateral direction of the dummy-fin semiconductor.

4. The manufacturing method of a semiconductor device according to claim 3 , wherein

the dummy-fin semiconductor and the second fin semiconductor on the insulating layer are removed with the first fin semiconductor being left on the insulating layer, when the second fin semiconductor has a higher etching rate than the first fin semiconductor.

5. The manufacturing method of a semiconductor device according to claim 1 , wherein

the forming the dummy-fin semiconductor on the semiconductor substrate includes:

forming a semiconductor layer on the semiconductor substrate;

forming a hard mask layer on the semiconductor layer; and

etching the semiconductor layer with the hard mask layer being used as a mask.

6. The manufacturing method of a semiconductor device according to claim 5 , wherein

the forming the insulating layer, into which the lower part of the dummy-fin semiconductor is buried, on the semiconductor substrate includes:

burying the whole dummy-fin semiconductor into the insulating layer; and

etching back the insulating layer.

7. The manufacturing method of a semiconductor device according to claim 1 , further comprising:

forming a sidewall on the side face of the fin semiconductor, before the dummy-fin semiconductor is removed.

8. The manufacturing method of a semiconductor device according to claim 7 , further comprising:

burying a protection film on a portion from which the dummy-fin semiconductor is removed, after the dummy-fin semiconductor is removed.

9. The manufacturing method of a semiconductor device according to claim 8 , further comprising:

forming a cap layer on the fin semiconductor, after the protection film is buried in the portion from which the dummy-fin semiconductor is removed.

10. The manufacturing method of a semiconductor device according to claim 9 , further comprising:

removing the sidewall and the protection film, after the cap layer is formed on the fin semiconductor; and

forming a gate insulating film on the side face of the fin semiconductor, after the sidewall and the protection film are removed.

11. The manufacturing method of a semiconductor device according to claim 10 , further comprising:

forming a gate electrode on the side face of the fin semiconductor via the gate insulating film.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 11, 2017
From: TOSHIBA CORPORATION
To: MICROSOFT TECHNOLOGY LICENSING, LLC
Reel/Frame 041333/0955 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2012
From: OKANO, KIMITOSHI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 028766/0682 →