SEMICONDUCTOR DEVICE
A semiconductor device includes a first semiconductor layer formed on a substrate; a second semiconductor layer formed on the first semiconductor layer; a third semiconductor layer formed on the second semiconductor layer; a gate electrode formed on the third semiconductor layer; and a source electrode and a drain electrode formed on the second semiconductor layer. The third semiconductor layer is formed with a semiconductor material doped with a p-type impurity element. In the third semiconductor layer, a p-type area is formed immediately below the gate electrode, and a high resistance area having a higher resistance than the p-type area is formed in an area other than the p-type area.
1 . A semiconductor device comprising:
a first semiconductor layer formed on a substrate;
a second semiconductor layer formed on the first semiconductor layer;
a third semiconductor layer formed on the second semiconductor layer;
a gate electrode formed on the third semiconductor layer; and
a source electrode and a drain electrode formed on the second semiconductor layer, wherein
the third semiconductor layer is formed with a semiconductor material doped with a p-type impurity element, and
in the third semiconductor layer, a p-type area is formed immediately below the gate electrode, and a high resistance area having a higher resistance than the p-type area is formed in an area other than the p-type area.
2 . The semiconductor device according to claim 1 , wherein in the high resistance area, the p-type impurity element is bound with hydrogen.
3 . The semiconductor device according to claim 1 , wherein
in the third semiconductor layer, a density of hydrogen in the high resistance area is higher than a density of hydrogen in the p-type area.
4 . The semiconductor device according to claim 1 , wherein
the p-type impurity element is Mg.
5 . The semiconductor device according to claim 1 , wherein
a density of Mg in the third semiconductor layer is 5×10 18 cm −3 through 5×10 20 cm −3 .
6 . The semiconductor device according to claim 1 , wherein
an insulating film is formed between the third semiconductor layer and the gate electrode.
7 . The semiconductor device according to claim 1 , wherein
a thickness of the third semiconductor layer in the high resistance area is less than a thickness of the third semiconductor layer in the p-type area.
8 . The semiconductor device according to claim 1 , wherein
the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer are formed with a nitride semiconductor.
9 . The semiconductor device according to claim 1 , wherein
the semiconductor material in the third semiconductor layer is a material including GaN.
10 . The semiconductor device according to claim 1 , wherein
the first semiconductor layer is formed with a material including GaN.
11 . The semiconductor device according to claim 1 , wherein
the second semiconductor layer is formed with a material including AlGaN.
12 . A power unit comprising:
the semiconductor device according to claim 1 .
13 . An amplifier comprising:
the semiconductor device according to claim 1 .
14 . A method of manufacturing a semiconductor device, the method comprising:
sequentially forming a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer including a p-type impurity element on a substrate;
performing a heating process in a nitrogen atmosphere after forming the third semiconductor layer;
forming a dielectric mask in an area on the third semiconductor layer where a gate electrode is to be formed;
performing a heating process in a hydrogen atmosphere or an ammonia atmosphere after forming the dielectric mask; and
removing the dielectric ask and forming the gate electrode in the area where the dielectric mask has been formed and removed,
15 . The method according to claim 14 , further comprising:
forming an insulating film on the third semiconductor layer after the performing of the heating process in the hydrogen atmosphere or the ammonia atmosphere; and
forming, via the insulating film, the gate electrode in the area where the dielectric mask has been formed and removed,
16 . The method according to claim 14 , further comprising:
removing part of the third semiconductor layer in an area where the dielectric mask is not formed, after the forming of the dielectric mask; and
performing the heating process in the hydrogen atmosphere or the ammonia atmosphere after the removing of the part of the third semiconductor layer.
17 . A method of manufacturing a semiconductor device, the method comprising:
sequentially forming a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer including a p-type impurity element on a substrate;
performing a heating process in a nitrogen atmosphere after forming the third. semiconductor layer;
forming a gate electrode on the third semiconductor layer; and
performing a heating process in a hydrogen atmosphere or an ammonia atmosphere after forming the gate electrode.
18 . The method according to claim 14 , wherein
the p-type impurity element is Mg.
19 . The method according to claim 14 , wherein
the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer are formed by MOVPE (Metal Organic Vapor Phase Epitaxy).
20 . The method according to claim 14 , further comprising:
forming a source electrode and a drain electrode in contact with the second semiconductor layer.