IP Library › Granted Patent US 10,748,233
Granted Patent B2
US 10,748,233 · App. 13/578,355 · Granted Aug 18, 2020

Full screen processing in multi-application environments

Inventors: Tao Zhao (Shanghai, CN); John C. Weast (Portland, OR); Brett P. Wang (Shanghai, CN)
Assignee: Intel Corporation
G06T1/20G06F9/451G06F9/485G06F9/4881
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Quick Facts
Patent No.
US 10,748,233
App. No.
13/578,355
Granted
Aug 18, 2020
Kind
B2
Abstract

Systems and methods for determining a foreground application and at least one background application from multiple graphics applications executing within an execution environment are disclosed. Pixel data rendered by the foreground application may be displayed in the execution environment while a rendering thread of the background application may be paused.

Claims (32)

1. A method, comprising:

at one or more processor cores,

determining, for a plurality of graphics applications executing within an execution environment, a foreground application and at least one background application;

providing pixel data rendered by the foreground application in the execution environment; and

pausing rendering processes of the background application while continuing rendering processes of the foreground application to provide the pixel data in response to an instruction to perform a switch between rendering to a foreground and rendering to a background.

2. The method of claim 1 , wherein the pixel data comprises pixel data rendered for full screen display by the execution environment.

3. The method of claim 1 , wherein determining a foreground application comprises intercepting a flip call.

4. The method of claim 1 , wherein providing the pixel data comprises performing a native flip for a rendering process of the foreground application.

5. The method of claim 4 , further comprising:

disabling the native flip for the rendering process of the foreground application; and

resuming the rendering processes of the background application.

6. The method of claim 1 , wherein determining a foreground application comprises providing information associated with the foreground application to an application registry.

7. The method of claim 1 , wherein determining a foreground application comprises detecting an underlying memory surface.

8. The method of claim 7 , wherein determining a foreground application comprises providing information associated with the memory surface to a graph library.

9. The method of claim 8 , wherein providing information associated with the memory surface to the graph library comprises using an agent associated with the foreground application to provide information associated with the memory surface to the graph library.

10. A system, comprising:

memory to store a plurality of graphics applications; and

one or more processor cores coupled to the memory, wherein the one or more processor cores are configured to determine, for the plurality of graphics applications, a foreground application and at least one background application, to provide pixel data rendered by the foreground application, and, while continuing rendering processes of the foreground application to provide the pixel data, to pause rendering processes of the background application in response to an instruction to perform a switch between rendering to a foreground and rendering to a background.

11. The system of claim 10 , wherein each graphics application comprises a graphics wrapper, and wherein the one or more processor cores are configured to determine the foreground application in response to information received from a graphics wrapper of the foreground application.

12. The system of claim 11 , wherein information received from the graphics wrapper of the foreground application comprises memory surface information.

13. The system of claim 10 , wherein the one or more processor cores are configured to determine a foreground application by intercepting a flip call.

14. The system of claim 10 , wherein the one or more processor cores are configured to provide the pixel data by performing a native flip for a rendering process of the foreground application.

15. An article comprising a computer program product having stored therein instructions that, if executed, result in:

at one or more processor cores,

determining, for a plurality of graphics applications executing within an execution environment, a foreground application and at least one background application;

providing pixel data rendered by the foreground application in the execution environment; and

pausing rendering processes of the background application while continuing rendering processes of the foreground application to provide the pixel data application in response to an instruction to perform a switch between rendering to a foreground and rendering to a background.

16. The article of claim 15 , wherein instructions for determining a foreground application include instructions for intercepting a flip call.

17. The article of claim 15 , wherein instructions for providing the pixel data include instructions for performing a native flip for a rendering process of the foreground application.

18. The article of claim 15 , wherein instructions for determining a foreground application include instructions for detecting an underlying memory surface.

19. The article of claim 18 , wherein instructions for determining a foreground application include instructions for providing information associated with the memory surface to a graph library.

20. The article of claim 19 , wherein instructions for providing information associated with the memory surface to the graph library include instructions for using an agent associated with the foreground application to provide information associated with the memory surface to the graph library.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 14, 2012
From: ZHAO, TAO; WEAST, JOHN C.; WANG, BRETT P.
To: INTEL CORPORATION
Reel/Frame 028783/0827 →
Continuity (1)
Related Publication 20190197650A1 · Jun 27, 2019
Cited By (1)
US 12,236,060