IP Library Patent Application 13586078
Patent Application
App. No. 13/586,078

COMPOUND SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

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Patent No.
US None
App. No.
13/586,078
Abstract

An embodiment of a compound semiconductor device includes: a substrate; an electron channel layer and an electron supply layer formed over the substrate; a gate electrode, a source electrode and a drain electrode formed on or above the electron supply layer; a p-type semiconductor layer formed between the electron supply layer and the gate electrode; and a hole barrier layer formed between the electron supply layer and the p-type semiconductor layer, a band gap of the hole barrier layer being larger than that of the electron supply layer.

Claims (47)

1 . A compound semiconductor device comprising:

a substrate;

an electron channel layer and an electron supply layer formed over the substrate;

a gate electrode, a source electrode and a drain electrode formed on or above the electron supply layer;

a p-type semiconductor layer formed between the electron supply layer and the gate electrode; and

a hole barrier layer formed between the electron supply layer and the p-type semiconductor layer, a band gap of the hole barrier layer being larger than that of the electron supply layer.

2 . The compound semiconductor device according to claim 1 , wherein

composition of the electron supply layer is represented by Al x Ga 1-x N (0<x<1), and

composition of the hole barrier layer is represented by Al y Ga 1-y N (x<y≦1).

3 . The compound semiconductor device according to claim 1 , wherein

composition of the electron supply layer is represented by Al x Ga 1-x N (0<x<1), and

composition of the hole barrier layer is represented by In z Ai 1-z N (0≦z≦1).

4 . The compound semiconductor device according to claim 1 , wherein the electron channel layer is a GaN layer.

5 . The compound semiconductor device according to claim 1 , wherein the p-type semiconductor layer is a GaN layer which contains Mg.

6 . The compound semiconductor device according to claim 1 , further comprising a gate insulating film formed between the gate electrode and the p-type semiconductor layer.

7 . The compound semiconductor device according to claim 1 , further comprising a termination film which covers the electron supply layer in each of a region between the gate electrode and the source electrode and a region between the gate electrode and the drain electrode.

8 . A power supply apparatus comprising

a compound semiconductor device, which comprises:

a substrate;

an electron channel layer and an electron supply layer formed over the substrate;

a gate electrode, a source electrode and a drain electrode formed on or above the electron supply layer;

a p-type semiconductor layer formed between the electron supply layer and the gate electrode; and

a hole barrier layer formed between the electron supply layer and the p-type semiconductor layer, a band gap of the hole barrier layer being larger than that of the electron supply layer.

9 . An amplifier comprising

a compound semiconductor device, which comprises:

a substrate;

an electron channel layer and an electron supply layer formed over the substrate;

a gate electrode, a source electrode and a drain electrode formed on or above the electron supply layer;

a p-type semiconductor layer formed between the electron supply layer and the gate electrode; and

a hole barrier layer formed between the electron supply layer and the p-type semiconductor layer, a band gap of the hole barrier layer being larger than that of the electron supply layer.

10 . A method of manufacturing a compound semiconductor device, comprising:

forming an electron channel layer and an electron supply layer over the substrate;

forming a gate electrode, a source electrode and a drain electrode on or above the electron supply layer;

forming a p-type semiconductor layer which is located between the electron supply layer and the gate electrode, before the forming the gate electrode; and

forming a hole barrier layer which is located between the electron supply layer and the p-type semiconductor layer, before the forming the p-type semiconductor layer, a band gap of the hole barrier layer being larger than that of the electron supply layer.

11 . The method of manufacturing a compound semiconductor device according to claim 10 , wherein

composition of the electron supply layer is represented by Al x Ga 1-x N (0<x<1), and

composition of the hole barrier supply layer is represented by Al y Ga 1-y N (x<y≦1).

12 . The method of manufacturing a compound semiconductor device according to claim 10 , wherein

composition of the electron supply layer is represented by Al x Ga 1-x N (0<x<1), and

composition of the hole barrier supply layer is represented by In z Ai 1-z N (0≦z≦1).

13 . The method of manufacturing a compound semiconductor, device according to claim 10 , wherein the forming the hole barrier supply layer comprises eliminating Ga from a surface of the electron supply layer.

14 . The method of manufacturing a compound semiconductor device according to claim 10 , wherein the forming the p-type semiconductor layer comprises performing patterning by dry etching with the hole barrier layer as an etching stopper.

15 . The method of manufacturing a compound semiconductor device according to claim 10 , wherein the electron channel layer is a GaN layer.

16 . The method of manufacturing a compound semiconductor device according to claim 10 , wherein the p-type semiconductor layer is a GaN layer which contains Mg.

17 . The method of manufacturing a compound semiconductor device according to claim 10 , further comprising forming a gate insulating film between the gate electrode and the p-type semiconductor layer.

18 . The method of manufacturing a compound semiconductor device according to claim 10 , further comprising forming a termination film which covers the electron supply layer in each of a region between the gate electrode and the source electrode and a region between the gate electrode and the drain electrode.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2014
From: FUJITSU LIMITED
To: TRANSPHORM JAPAN, INC.
Reel/Frame 032865/0196 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2012
From: IMANISHI, KENJI
To: FUJITSU LIMITED
Reel/Frame 028860/0517 →