Micro-plasma field effect transistors

1. A micro-plasma device, comprising:

a plasma gas enclosure containing at least one plasma gas;

a plasma generation circuit interfaced with the plasma gas enclosure; and

a plurality of electrodes interfaced with the plasma gas enclosure, wherein the plurality of electrodes includes a source electrode and a drain electrode.

2. The micro-plasma device of claim 1 , wherein the at least one plasma gas includes at least one noble gas.

3. The micro-plasma device of claim 1 , wherein the plasma enclosure is at least partially comprised of fused silica.

4. The micro-plasma device of claim 1 , wherein the plasma generation circuit includes plasma generating electrodes.

5. The micro-plasma device of claim 4 , wherein the plasma generating electrodes are formed as an interdigital transducer (IDT).

6. The micro-plasma device of claim 4 , wherein the plasma generating electrodes are formed in a layer at least partially comprised of fused silica.

7. The micro-plasma device of claim 6 , wherein the layer is bonded to the plasma enclosure.

8. The micro-plasma device of claim 1 , wherein the plasma generation circuit includes an RF power source.

9. The micro-plasma device of claim 1 , wherein the plasma generation circuit includes a matching inductor.

10. The micro-plasma device of claim 1 , wherein the plurality of electrodes further includes an insulated gate electrode.

11. The micro-plasma device of claim 1 , wherein the plurality of electrodes are formed in a layer at least partially comprised of fused silica.

12. The micro-plasma device of claim 11 , wherein the layer is bonded to the plasma enclosure.

13. The micro-plasma device of claim 1 , wherein the plasma generation circuit is configured to generate at least one of positive plasma ions and negative plasma ions.

14. A micro-plasma circuitry apparatus, comprising:

a first layer having plasma generating electrodes;

a second layer having a cavity formed therein;

a third layer having a circuit formed therein including a micro-plasma circuit (MPC) that includes one or more micro-plasma devices (MPDs); and

a metallic layer covering the MPC except at locations of the MPDs,

wherein the first layer is bonded to the second layer and the second layer is bonded to the third layer, thereby forming an enclosure that contains at least one plasma gas.

15. The micro-plasma circuitry apparatus of claim 14 , wherein the second layer is at least partially comprised of fused silica.

16. The micro-plasma circuitry apparatus of claim 14 , wherein the plasma generating electrodes are formed as an interdigital transducer (IDT).

17. The micro-plasma circuitry apparatus of claim 14 , wherein the first layer is at least partially comprised of fused silica.

18. The micro-plasma circuitry apparatus of claim 14 , wherein at least one MPD of the MPDs includes a plurality of electrodes.

19. The micro-plasma circuitry apparatus of claim 14 , wherein the MPD is configured to operate in an enhancement mode.

20. The micro-plasma circuitry apparatus of claim 14 , wherein the MPD is a metal-oxide-plasma field-effect transistor (MOPFET).

21. The micro-plasma circuitry apparatus of claim 20 , wherein the MOPFET is configured to operate as at least one of a switch or an amplifier for the MPC.

22. The micro-plasma circuitry apparatus of claim 14 , wherein the third layer is at least partially comprised of fused silica.

23. The micro-plasma circuitry apparatus of claim 14 , wherein the MPC includes a NAND gate comprised of at least two of the MPDs.

24. The micro-plasma circuitry apparatus of claim 14 , wherein the MPC includes a NOR gate comprised of at least two of the MPDs.